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Commit 59fd27cd authored by Huang Rui's avatar Huang Rui Committed by Alex Deucher
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drm/amdgpu: use queue 0 for kiq ring 



It must use queue id 0, because CGPG_IDLE/SAVE/LOAD/RUN only can be issued on
queue 0.

Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Acked-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 95244db2

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

+6 −2
Original line number Diff line number Diff line
@@ -179,8 +179,12 @@ static int amdgpu_gfx_kiq_acquire(struct amdgpu_device *adev, 


		amdgpu_gfx_bit_to_queue(adev, queue_bit, &mec, &pipe, &queue);



		/* Using pipes 2/3 from MEC 2 seems cause problems */

		if (mec == 1 && pipe > 1)

		/*

		 * 1. Using pipes 2/3 from MEC 2 seems cause problems.

		 * 2. It must use queue id 0, because CGPG_IDLE/SAVE/LOAD/RUN

		 * only can be issued on queue 0.

		 */

		if ((mec == 1 && pipe > 1) || queue != 0)

			continue;



		ring->me = mec + 1;