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Commit 58cd8fbc authored by Christian König's avatar Christian König Committed by Alex Deucher
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drm/amdgpu: limit reg_write_reg_wait workaround to SRIOV v2 



Turned out that this locks up some bare metal Vega10.

v2: fix stupid typo

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b5b4ea4d

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+6 −1
Original line number Diff line number Diff line
@@ -4144,7 +4144,12 @@ static void gfx_v9_0_ring_emit_reg_write_reg_wait(struct amdgpu_ring *ring, 
{

	int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);



	gfx_v9_0_wait_reg_mem(ring, usepfp, 0, 1, reg0, reg1, ref, mask, 0x20);

	if (amdgpu_sriov_vf(ring->adev))

		gfx_v9_0_wait_reg_mem(ring, usepfp, 0, 1, reg0, reg1,

				      ref, mask, 0x20);

	else

		amdgpu_ring_emit_reg_write_reg_wait_helper(ring, reg0, reg1,

							   ref, mask);

}



static void gfx_v9_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev,