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Commit 588ab3f9 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux 

Pull arm64 updates from Catalin Marinas:
 "Here are the main arm64 updates for 4.6.  There are some relatively
  intrusive changes to support KASLR, the reworking of the kernel
  virtual memory layout and initial page table creation.

  Summary:

   - Initial page table creation reworked to avoid breaking large block
     mappings (huge pages) into smaller ones.  The ARM architecture
     requires break-before-make in such cases to avoid TLB conflicts but
     that's not always possible on live page tables

   - Kernel virtual memory layout: the kernel image is no longer linked
     to the bottom of the linear mapping (PAGE_OFFSET) but at the bottom
     of the vmalloc space, allowing the kernel to be loaded (nearly)
     anywhere in physical RAM

   - Kernel ASLR: position independent kernel Image and modules being
     randomly mapped in the vmalloc space with the randomness is
     provided by UEFI (efi_get_random_bytes() patches merged via the
     arm64 tree, acked by Matt Fleming)

   - Implement relative exception tables for arm64, required by KASLR
     (initial code for ARCH_HAS_RELATIVE_EXTABLE added to lib/extable.c
     but actual x86 conversion to deferred to 4.7 because of the merge
     dependencies)

   - Support for the User Access Override feature of ARMv8.2: this
     allows uaccess functions (get_user etc.) to be implemented using
     LDTR/STTR instructions.  Such instructions, when run by the kernel,
     perform unprivileged accesses adding an extra level of protection.
     The set_fs() macro is used to "upgrade" such instruction to
     privileged accesses via the UAO bit

   - Half-precision floating point support (part of ARMv8.2)

   - Optimisations for CPUs with or without a hardware prefetcher (using
     run-time code patching)

   - copy_page performance improvement to deal with 128 bytes at a time

   - Sanity checks on the CPU capabilities (via CPUID) to prevent
     incompatible secondary CPUs from being brought up (e.g.  weird
     big.LITTLE configurations)

   - valid_user_regs() reworked for better sanity check of the
     sigcontext information (restored pstate information)

   - ACPI parking protocol implementation

   - CONFIG_DEBUG_RODATA enabled by default

   - VDSO code marked as read-only

   - DEBUG_PAGEALLOC support

   - ARCH_HAS_UBSAN_SANITIZE_ALL enabled

   - Erratum workaround Cavium ThunderX SoC

   - set_pte_at() fix for PROT_NONE mappings

   - Code clean-ups"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (99 commits)
  arm64: kasan: Fix zero shadow mapping overriding kernel image shadow
  arm64: kasan: Use actual memory node when populating the kernel image shadow
  arm64: Update PTE_RDONLY in set_pte_at() for PROT_NONE permission
  arm64: Fix misspellings in comments.
  arm64: efi: add missing frame pointer assignment
  arm64: make mrs_s prefixing implicit in read_cpuid
  arm64: enable CONFIG_DEBUG_RODATA by default
  arm64: Rework valid_user_regs
  arm64: mm: check at build time that PAGE_OFFSET divides the VA space evenly
  arm64: KVM: Move kvm_call_hyp back to its original localtion
  arm64: mm: treat memstart_addr as a signed quantity
  arm64: mm: list kernel sections in order
  arm64: lse: deal with clobbered IP registers after branch via PLT
  arm64: mm: dump: Use VA_START directly instead of private LOWEST_ADDR
  arm64: kconfig: add submenu for 8.2 architectural features
  arm64: kernel: acpi: fix ioremap in ACPI parking protocol cpu_postboot
  arm64: Add support for Half precision floating point
  arm64: Remove fixmap include fragility
  arm64: Add workaround for Cavium erratum 27456
  arm64: mm: Mark .rodata as RO
  ...
parents 3d15cfdb 2776e0e8

Documentation/arm64/booting.txt

+13 −7
Original line number Diff line number Diff line
@@ -109,7 +109,13 @@ Header notes: 
			1 - 4K

			2 - 16K

			3 - 64K

  Bits 3-63:	Reserved.

  Bit 3:	Kernel physical placement

			0 - 2MB aligned base should be as close as possible

			    to the base of DRAM, since memory below it is not

			    accessible via the linear mapping

			1 - 2MB aligned base may be anywhere in physical

			    memory

  Bits 4-63:	Reserved.



- When image_size is zero, a bootloader should attempt to keep as much

  memory as possible free for use by the kernel immediately after the
@@ -117,14 +123,14 @@ Header notes: 
  depending on selected features, and is effectively unbound.



The Image must be placed text_offset bytes from a 2MB aligned base

address near the start of usable system RAM and called there. Memory

below that base address is currently unusable by Linux, and therefore it

is strongly recommended that this location is the start of system RAM.

The region between the 2 MB aligned base address and the start of the

image has no special significance to the kernel, and may be used for

other purposes.

address anywhere in usable system RAM and called there. The region

between the 2 MB aligned base address and the start of the image has no

special significance to the kernel, and may be used for other purposes.

At least image_size bytes from the start of the image must be free for

use by the kernel.

NOTE: versions prior to v4.6 cannot make use of memory below the

physical offset of the Image so it is recommended that the Image be

placed as close as possible to the start of system RAM.



Any memory described to the kernel (even that below the start of the

image) which is not marked as reserved from the kernel (e.g., with a

Documentation/arm64/silicon-errata.txt

+1 −0
Original line number Diff line number Diff line
@@ -56,3 +56,4 @@ stable kernels. 
|                |                 |                 |                         |

| Cavium         | ThunderX ITS    | #22375, #24313  | CAVIUM_ERRATUM_22375    |

| Cavium         | ThunderX GICv3  | #23154          | CAVIUM_ERRATUM_23154    |

| Cavium         | ThunderX Core   | #27456          | CAVIUM_ERRATUM_27456    |

Documentation/features/vm/huge-vmap/arch-support.txt

+1 −1
Original line number Diff line number Diff line
@@ -9,7 +9,7 @@ 
    |       alpha: | TODO |

    |         arc: | TODO |

    |         arm: | TODO |

    |       arm64: | TODO |

    |       arm64: |  ok  |

    |       avr32: | TODO |

    |    blackfin: | TODO |

    |         c6x: | TODO |

arch/arm/include/asm/kvm_asm.h

+2 −0
Original line number Diff line number Diff line
@@ -48,6 +48,8 @@ 
#define rr_lo_hi(a1, a2) a1, a2

#endif



#define kvm_ksym_ref(kva)	(kva)



#ifndef __ASSEMBLY__

struct kvm;

struct kvm_vcpu;

arch/arm/kvm/arm.c

+5 −3
Original line number Diff line number Diff line
@@ -1051,7 +1051,7 @@ static void cpu_init_hyp_mode(void *dummy) 
	pgd_ptr = kvm_mmu_get_httbr();

	stack_page = __this_cpu_read(kvm_arm_hyp_stack_page);

	hyp_stack_ptr = stack_page + PAGE_SIZE;

	vector_ptr = (unsigned long)__kvm_hyp_vector;

	vector_ptr = (unsigned long)kvm_ksym_ref(__kvm_hyp_vector);



	__cpu_init_hyp_mode(boot_pgd_ptr, pgd_ptr, hyp_stack_ptr, vector_ptr);

	__cpu_init_stage2();
@@ -1220,13 +1220,15 @@ static int init_hyp_mode(void) 
	/*

	 * Map the Hyp-code called directly from the host

	 */

	err = create_hyp_mappings(__hyp_text_start, __hyp_text_end);

	err = create_hyp_mappings(kvm_ksym_ref(__hyp_text_start),

				  kvm_ksym_ref(__hyp_text_end));

	if (err) {

		kvm_err("Cannot map world-switch code\n");

		goto out_err;

	}



	err = create_hyp_mappings(__start_rodata, __end_rodata);

	err = create_hyp_mappings(kvm_ksym_ref(__start_rodata),

				  kvm_ksym_ref(__end_rodata));

	if (err) {

		kvm_err("Cannot map rodata section\n");

		goto out_err;