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Commit 5808184f authored by Ralf Baechle's avatar Ralf Baechle
Browse files

MIPS: uasm: Add OR instruction. 



This is needed for the fix of the M3 workaround.

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 8d9df29d

arch/mips/include/asm/uasm.h

+1 −0
Original line number Diff line number Diff line
@@ -84,6 +84,7 @@ Ip_u2s3u1(_lw); 
Ip_u1u2u3(_mfc0);

Ip_u1u2u3(_mtc0);

Ip_u2u1u3(_ori);

Ip_u3u1u2(_or);

Ip_u2s3u1(_pref);

Ip_0(_rfe);

Ip_u2s3u1(_sc);

arch/mips/mm/uasm.c

+3 −1
Original line number Diff line number Diff line
@@ -64,7 +64,7 @@ enum opcode { 
	insn_dmtc0, insn_dsll, insn_dsll32, insn_dsra, insn_dsrl,

	insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal,

	insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0,

	insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd,

	insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd,

	insn_sd, insn_sll, insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw,

	insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori,

	insn_dins, insn_syscall
@@ -120,6 +120,7 @@ static struct insn insn_table[] __cpuinitdata = { 
	{ insn_lw,  M(lw_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },

	{ insn_mfc0,  M(cop0_op, mfc_op, 0, 0, 0, 0),  RT | RD | SET},

	{ insn_mtc0,  M(cop0_op, mtc_op, 0, 0, 0, 0),  RT | RD | SET},

	{ insn_or,  M(spec_op, 0, 0, 0, 0, or_op),  RS | RT | RD },

	{ insn_ori,  M(ori_op, 0, 0, 0, 0, 0),  RS | RT | UIMM },

	{ insn_pref,  M(pref_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },

	{ insn_rfe,  M(cop0_op, cop_op, 0, 0, 0, rfe_op),  0 },
@@ -387,6 +388,7 @@ I_u2s3u1(_lw) 
I_u1u2u3(_mfc0)

I_u1u2u3(_mtc0)

I_u2u1u3(_ori)

I_u3u1u2(_or)

I_u2s3u1(_pref)

I_0(_rfe)

I_u2s3u1(_sc)