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Commit 57e22f4a authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
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drm/i915: Use frame counter for intel_wait_for_vblank() on CTG 



Use the same wait_for_vblank code for CTG that we use for ILK+.

Also fix the name of the frame counter register while at it.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@gmail.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent edc08d0a

drivers/gpu/drm/i915/intel_display.c

+4 −4
Original line number Diff line number Diff line
@@ -748,10 +748,10 @@ enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv, 
	return intel_crtc->config.cpu_transcoder;

}



static void ironlake_wait_for_vblank(struct drm_device *dev, int pipe)

static void g4x_wait_for_vblank(struct drm_device *dev, int pipe)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	u32 frame, frame_reg = PIPEFRAME(pipe);

	u32 frame, frame_reg = PIPE_FRMCOUNT_GM45(pipe);



	frame = I915_READ(frame_reg);
@@ -772,8 +772,8 @@ void intel_wait_for_vblank(struct drm_device *dev, int pipe) 
	struct drm_i915_private *dev_priv = dev->dev_private;

	int pipestat_reg = PIPESTAT(pipe);



	if (INTEL_INFO(dev)->gen >= 5) {

		ironlake_wait_for_vblank(dev, pipe);

	if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {

		g4x_wait_for_vblank(dev, pipe);

		return;

	}