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Commit 5782f97b authored by Michael Jones's avatar Michael Jones Committed by Mauro Carvalho Chehab
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[media] omap3isp: ccdc: support Y10/12, 8-bit bayer fmts 



Add support for 8-bit bayer and 10- and 12-bit grey formats at the CCDC
input. Y12 is truncated to Y10 at the CCDC output.

Signed-off-by: default avatarMichael Jones <michael.jones@matrix-vision.de>
Acked-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent cbbc69a4

drivers/media/video/omap3isp/ispccdc.c

+6 −0
Original line number Diff line number Diff line
@@ -43,6 +43,12 @@ __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh, 


static const unsigned int ccdc_fmts[] = {

	V4L2_MBUS_FMT_Y8_1X8,

	V4L2_MBUS_FMT_Y10_1X10,

	V4L2_MBUS_FMT_Y12_1X12,

	V4L2_MBUS_FMT_SGRBG8_1X8,

	V4L2_MBUS_FMT_SRGGB8_1X8,

	V4L2_MBUS_FMT_SBGGR8_1X8,

	V4L2_MBUS_FMT_SGBRG8_1X8,

	V4L2_MBUS_FMT_SGRBG10_1X10,

	V4L2_MBUS_FMT_SRGGB10_1X10,

	V4L2_MBUS_FMT_SBGGR10_1X10,

drivers/media/video/omap3isp/ispvideo.c

+12 −0
Original line number Diff line number Diff line
@@ -48,6 +48,18 @@ 
static struct isp_format_info formats[] = {

	{ V4L2_MBUS_FMT_Y8_1X8, V4L2_MBUS_FMT_Y8_1X8,

	  V4L2_MBUS_FMT_Y8_1X8, V4L2_PIX_FMT_GREY, 8, },

	{ V4L2_MBUS_FMT_Y10_1X10, V4L2_MBUS_FMT_Y10_1X10,

	  V4L2_MBUS_FMT_Y10_1X10, V4L2_PIX_FMT_Y10, 10, },

	{ V4L2_MBUS_FMT_Y12_1X12, V4L2_MBUS_FMT_Y10_1X10,

	  V4L2_MBUS_FMT_Y12_1X12, V4L2_PIX_FMT_Y12, 12, },

	{ V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_MBUS_FMT_SBGGR8_1X8,

	  V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_PIX_FMT_SBGGR8, 8, },

	{ V4L2_MBUS_FMT_SGBRG8_1X8, V4L2_MBUS_FMT_SGBRG8_1X8,

	  V4L2_MBUS_FMT_SGBRG8_1X8, V4L2_PIX_FMT_SGBRG8, 8, },

	{ V4L2_MBUS_FMT_SGRBG8_1X8, V4L2_MBUS_FMT_SGRBG8_1X8,

	  V4L2_MBUS_FMT_SGRBG8_1X8, V4L2_PIX_FMT_SGRBG8, 8, },

	{ V4L2_MBUS_FMT_SRGGB8_1X8, V4L2_MBUS_FMT_SRGGB8_1X8,

	  V4L2_MBUS_FMT_SRGGB8_1X8, V4L2_PIX_FMT_SRGGB8, 8, },

	{ V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8, V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8,

	  V4L2_MBUS_FMT_SGRBG10_1X10, V4L2_PIX_FMT_SGRBG10DPCM8, 8, },

	{ V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_MBUS_FMT_SBGGR10_1X10,