Loading asoc/codecs/bolero/tx-macro.c +10 −10 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. /* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. */ #include <linux/module.h> Loading Loading @@ -175,7 +175,7 @@ struct tx_macro_priv { int dec_mode[NUM_DECIMATORS]; bool bcs_clk_en; bool hs_slow_insert_complete; int amic_sample_rate; int pcm_rate[NUM_DECIMATORS]; }; static bool tx_macro_get_data(struct snd_soc_component *component, Loading Loading @@ -501,23 +501,23 @@ static void tx_macro_tx_hpf_corner_freq_callback(struct work_struct *work) snd_soc_component_update_bits(component, hpf_gate_reg, 0x03, 0x02); /* Add delay between toggle hpf gate based on sample rate */ switch(tx_priv->amic_sample_rate) { case 8000: switch (tx_priv->pcm_rate[hpf_work->decimator]) { case 0: usleep_range(125, 130); break; case 16000: case 1: usleep_range(62, 65); break; case 32000: case 3: usleep_range(31, 32); break; case 48000: case 4: usleep_range(20, 21); break; case 96000: case 5: usleep_range(10, 11); break; case 192000: case 6: usleep_range(5, 6); break; default: Loading Loading @@ -953,7 +953,7 @@ static int tx_macro_enable_dec(struct snd_soc_dapm_widget *w, tx_fs_reg = BOLERO_CDC_TX0_TX_PATH_CTL + TX_MACRO_TX_PATH_OFFSET * decimator; tx_priv->amic_sample_rate = (snd_soc_component_read32(component, tx_priv->pcm_rate[decimator] = (snd_soc_component_read32(component, tx_fs_reg) & 0x0F); switch (event) { Loading asoc/codecs/bolero/va-macro.c +30 −3 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. /* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. */ #include <linux/module.h> Loading Loading @@ -173,6 +173,7 @@ struct va_macro_priv { bool lpi_enable; bool register_event_listener; int dec_mode[VA_MACRO_NUM_DECIMATORS]; int pcm_rate[VA_MACRO_NUM_DECIMATORS]; }; static bool va_macro_get_data(struct snd_soc_component *component, Loading Loading @@ -834,8 +835,29 @@ static void va_macro_tx_hpf_corner_freq_callback(struct work_struct *work) hpf_cut_off_freq << 5); snd_soc_component_update_bits(component, hpf_gate_reg, 0x03, 0x02); /* Minimum 1 clk cycle delay is required as per HW spec */ usleep_range(1000, 1010); /* Add delay between toggle hpf gate based on sample rate */ switch (va_priv->pcm_rate[hpf_work->decimator]) { case 0: usleep_range(125, 130); break; case 1: usleep_range(62, 65); break; case 3: usleep_range(31, 32); break; case 4: usleep_range(20, 21); break; case 5: usleep_range(10, 11); break; case 6: usleep_range(5, 6); break; default: usleep_range(125, 130); } snd_soc_component_update_bits(component, hpf_gate_reg, 0x03, 0x01); } else { Loading Loading @@ -1091,6 +1113,7 @@ static int va_macro_enable_dec(struct snd_soc_dapm_widget *w, u16 tx_vol_ctl_reg, dec_cfg_reg, hpf_gate_reg; u16 tx_gain_ctl_reg; u8 hpf_cut_off_freq; u16 tx_fs_reg = 0; struct device *va_dev = NULL; struct va_macro_priv *va_priv = NULL; int hpf_delay = BOLERO_CDC_VA_TX_DMIC_HPF_DELAY_MS; Loading @@ -1112,6 +1135,10 @@ static int va_macro_enable_dec(struct snd_soc_dapm_widget *w, VA_MACRO_TX_PATH_OFFSET * decimator; tx_gain_ctl_reg = BOLERO_CDC_VA_TX0_TX_VOL_CTL + VA_MACRO_TX_PATH_OFFSET * decimator; tx_fs_reg = BOLERO_CDC_VA_TX0_TX_PATH_CTL + VA_MACRO_TX_PATH_OFFSET * decimator; va_priv->pcm_rate[decimator] = (snd_soc_component_read32(component, tx_fs_reg) & 0x0F); switch (event) { case SND_SOC_DAPM_PRE_PMU: Loading Loading
asoc/codecs/bolero/tx-macro.c +10 −10 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. /* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. */ #include <linux/module.h> Loading Loading @@ -175,7 +175,7 @@ struct tx_macro_priv { int dec_mode[NUM_DECIMATORS]; bool bcs_clk_en; bool hs_slow_insert_complete; int amic_sample_rate; int pcm_rate[NUM_DECIMATORS]; }; static bool tx_macro_get_data(struct snd_soc_component *component, Loading Loading @@ -501,23 +501,23 @@ static void tx_macro_tx_hpf_corner_freq_callback(struct work_struct *work) snd_soc_component_update_bits(component, hpf_gate_reg, 0x03, 0x02); /* Add delay between toggle hpf gate based on sample rate */ switch(tx_priv->amic_sample_rate) { case 8000: switch (tx_priv->pcm_rate[hpf_work->decimator]) { case 0: usleep_range(125, 130); break; case 16000: case 1: usleep_range(62, 65); break; case 32000: case 3: usleep_range(31, 32); break; case 48000: case 4: usleep_range(20, 21); break; case 96000: case 5: usleep_range(10, 11); break; case 192000: case 6: usleep_range(5, 6); break; default: Loading Loading @@ -953,7 +953,7 @@ static int tx_macro_enable_dec(struct snd_soc_dapm_widget *w, tx_fs_reg = BOLERO_CDC_TX0_TX_PATH_CTL + TX_MACRO_TX_PATH_OFFSET * decimator; tx_priv->amic_sample_rate = (snd_soc_component_read32(component, tx_priv->pcm_rate[decimator] = (snd_soc_component_read32(component, tx_fs_reg) & 0x0F); switch (event) { Loading
asoc/codecs/bolero/va-macro.c +30 −3 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. /* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. */ #include <linux/module.h> Loading Loading @@ -173,6 +173,7 @@ struct va_macro_priv { bool lpi_enable; bool register_event_listener; int dec_mode[VA_MACRO_NUM_DECIMATORS]; int pcm_rate[VA_MACRO_NUM_DECIMATORS]; }; static bool va_macro_get_data(struct snd_soc_component *component, Loading Loading @@ -834,8 +835,29 @@ static void va_macro_tx_hpf_corner_freq_callback(struct work_struct *work) hpf_cut_off_freq << 5); snd_soc_component_update_bits(component, hpf_gate_reg, 0x03, 0x02); /* Minimum 1 clk cycle delay is required as per HW spec */ usleep_range(1000, 1010); /* Add delay between toggle hpf gate based on sample rate */ switch (va_priv->pcm_rate[hpf_work->decimator]) { case 0: usleep_range(125, 130); break; case 1: usleep_range(62, 65); break; case 3: usleep_range(31, 32); break; case 4: usleep_range(20, 21); break; case 5: usleep_range(10, 11); break; case 6: usleep_range(5, 6); break; default: usleep_range(125, 130); } snd_soc_component_update_bits(component, hpf_gate_reg, 0x03, 0x01); } else { Loading Loading @@ -1091,6 +1113,7 @@ static int va_macro_enable_dec(struct snd_soc_dapm_widget *w, u16 tx_vol_ctl_reg, dec_cfg_reg, hpf_gate_reg; u16 tx_gain_ctl_reg; u8 hpf_cut_off_freq; u16 tx_fs_reg = 0; struct device *va_dev = NULL; struct va_macro_priv *va_priv = NULL; int hpf_delay = BOLERO_CDC_VA_TX_DMIC_HPF_DELAY_MS; Loading @@ -1112,6 +1135,10 @@ static int va_macro_enable_dec(struct snd_soc_dapm_widget *w, VA_MACRO_TX_PATH_OFFSET * decimator; tx_gain_ctl_reg = BOLERO_CDC_VA_TX0_TX_VOL_CTL + VA_MACRO_TX_PATH_OFFSET * decimator; tx_fs_reg = BOLERO_CDC_VA_TX0_TX_PATH_CTL + VA_MACRO_TX_PATH_OFFSET * decimator; va_priv->pcm_rate[decimator] = (snd_soc_component_read32(component, tx_fs_reg) & 0x0F); switch (event) { case SND_SOC_DAPM_PRE_PMU: Loading