Commit 56e6ed45 authored Sep 22, 2017 by Yongqiang Sun Committed by Alex Deucher Oct 21, 2017

drm/amd/display: Only reset top pipe back end.



Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 671a6246

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -1270,6 +1270,9 @@ static void reset_hw_ctx_wrap(
		if (!pipe_ctx_old->stream)
		continue;

		if (pipe_ctx_old->top_pipe)
		continue;

		if (!pipe_ctx->stream \|\|
		pipe_need_reprogram(pipe_ctx_old, pipe_ctx)) {
		struct clock_source *old_clk = pipe_ctx_old->clock_source;