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Required properties:

  - compatible : "delta,dfbmcs320"

  - compatible : "delta,dfbmcs320" or "linux,bt-sco"

Example:

CS35L33 Speaker Amplifier

Required properties:

  - compatible : "cirrus,cs35l33"

  - reg : the I2C address of the device for I2C

  - VA-supply, VP-supply : power supplies for the device,

    as covered in

    Documentation/devicetree/bindings/regulator/regulator.txt.

Optional properties:

  - reset-gpios : gpio used to reset the amplifier

  - interrupt-parent : Specifies the phandle of the interrupt controller to

    which the IRQs from CS35L33 are delivered to.

 -  interrupts : IRQ line info CS35L33.

    (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt

    for further information relating to interrupt properties)

  - cirrus,boost-ctl : Booster voltage use to supply the amp. If the value is

    0, then VBST = VP. If greater than 0, the boost voltage will be 3300mV with

    a value of 1 and will increase at a step size of 100mV until a maximum of

    8000mV.

  - cirrus,ramp-rate : On power up, it affects the time from when the power

    up sequence begins to the time the audio reaches a full-scale output.

    On power down, it affects the time from when the power-down sequence

    begins to when the amplifier disables the PWM outputs. If this property

    is not set then soft ramping will be disabled and ramp time would be

    20ms. If this property is set to 0,1,2,3 then ramp times would be 40ms,

    60ms,100ms,175ms respectively for 48KHz sample rate.

  - cirrus,boost-ipk : The maximum current allowed for the boost converter.

    The range starts at 1850000uA and goes to a maximum of 3600000uA

    with a step size of 15625uA. The default is 2500000uA.

  - cirrus,imon-adc-scale : Configures the scaling of data bits from the IMON

    ADC data word. This property can be set as a value of 0 for bits 15 down

    to 0, 6 for 21 down to 6, 7, for 22 down to 7, 8 for 23 down to 8.

Optional H/G Algorithm sub-node:

The cs35l33 node can have a single "cirrus,hg-algo" sub-node that will enable

the internal H/G Algorithm.

  - cirrus,hg-algo : Sub-node for internal Class H/G algorithm that

    controls the amplifier supplies.

Optional properties for the "cirrus,hg-algo" sub-node:

  - cirrus,mem-depth : Memory depth for the Class H/G algorithm measured in

    LRCLK cycles. If this property is set to 0, 1, 2, or 3 then the memory

    depths will be 1, 4, 8, 16 LRCLK cycles.  The default is 16 LRCLK cycles.

    cirrus,release-rate : The number of consecutive LRCLK periods before

    allowing release condition tracking updates. The number of LRCLK periods

    start at 3 to a maximum of 255.

  - cirrus,ldo-thld : Configures the signal threshold at which the PWM output

    stage enters LDO operation. Starts as a default value of 50mV for a value

    of 1 and increases with a step size of 50mV to a maximum of 750mV (value of

    0xF).

  - cirrus,ldo-path-disable : This is a boolean property. If present, the H/G

    algorithm uses the max detection path.  If not present, the LDO

    detection path is used.

  - cirrus,ldo-entry-delay : The LDO entry delay in milliseconds before the H/G

    algorithm switches to the LDO voltage.  This property can be set to values

    from 0 to 7 for delays of 5ms, 10ms, 50ms, 100ms, 200ms, 500ms, 1000ms.

    The default is 100ms.

  - cirrus,vp-hg-auto : This is a boolean property.  When set, class H/G VPhg

    automatic updating is enabled.

  - cirrus,vp-hg :  Class H/G algorithm VPhg.  Controls the H/G algorithm's

    reference to the VP voltage for when to start generating a boosted VBST.

    The reference voltage starts at 3000mV with a value of 0x3 and is increased

    by 100mV per step to a maximum of 5500mV.

  - cirrus,vp-hg-rate : The rate (number of LRCLK periods) at which the VPhg is

    allowed to increase to a higher voltage when using VPhg automatic

    tracking. This property can be set to values from 0 to 3 with rates of 128

    periods, 2048 periods, 32768 periods, and 524288 periods.

    The default is 32768 periods.

  - cirrus,vp-hg-va : VA calculation reference for automatic VPhg tracking

    using VPMON. This property can be set to values from 0 to 6 starting at

    1800mV with a step size of 50mV up to a maximum value of 1750mV.

    Default is 1800mV.

Example:

cs35l33: cs35l33@40 {

	compatible = "cirrus,cs35l33";

	reg = <0x40>;

	VA-supply = <&ldo5_reg>;

	VP-supply = <&ldo5_reg>;

	interrupt-parent = <&gpio8>;

	interrupts = <3 IRQ_TYPE_LEVEL_LOW>;

	reset-gpios = <&cs47l91 34 0>;

	cirrus,ramp-rate = <0x0>;

	cirrus,boost-ctl = <0x30>;  /* VBST = 8000mV */

	cirrus,boost-ipk = <0xE0>; /* 3600mA */

	cirrus,imon-adc-scale = <0> /* Bits 15 down to 0 */

	cirrus,hg-algo {

		cirrus,mem-depth = <0x3>;

		cirrus,release-rate = <0x3>;

		cirrus,ldo-thld = <0x1>;

		cirrus,ldo-path-disable = <0x0>;

		cirrus,ldo-entry-delay=<0x4>;

		cirrus,vp-hg-auto;

		cirrus,vp-hg=<0xF>;

		cirrus,vp-hg-rate=<0x2>;

		cirrus,vp-hg-va=<0x0>;

	};

};

/*

 * linux/sound/cs35l33.h -- Platform data for CS35l33

 *

 * Copyright (c) 2016 Cirrus Logic Inc.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

#ifndef __CS35L33_H

#define __CS35L33_H

struct cs35l33_hg {

	bool enable_hg_algo;

	unsigned int mem_depth;

	unsigned int release_rate;

	unsigned int hd_rm;

	unsigned int ldo_thld;

	unsigned int ldo_path_disable;

	unsigned int ldo_entry_delay;

	bool vp_hg_auto;

	unsigned int vp_hg;

	unsigned int vp_hg_rate;

	unsigned int vp_hg_va;

};

struct cs35l33_pdata {

	/* Boost Controller Voltage Setting */

	unsigned int boost_ctl;

	/* Boost Controller Peak Current */

	unsigned int boost_ipk;

	/* Amplifier Drive Select */

	unsigned int amp_drv_sel;

	/* soft volume ramp */

	unsigned int ramp_rate;

	/* IMON adc scale */

	unsigned int imon_adc_scale;

	/* H/G algo configuration */

	struct cs35l33_hg hg_config;

};

#endif /* __CS35L33_H */

config SND_ATMEL_SOC_PDC

	tristate

	depends on HAS_DMA

	default m if SND_ATMEL_SOC_SSC_PDC=m && SND_ATMEL_SOC_SSC=m

	default y if SND_ATMEL_SOC_SSC_PDC=y || (SND_ATMEL_SOC_SSC_PDC=m && SND_ATMEL_SOC_SSC=y)

	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

	if (!res) {

		dev_err(dev, "no memory resource\n");

		return -ENXIO;

	}

	io_base = devm_ioremap_resource(dev, res);

	if (IS_ERR(io_base)) {

		ret =  PTR_ERR(io_base);