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Commit 55d74adf authored by Marek Szyprowski's avatar Marek Szyprowski Committed by Krzysztof Kozlowski
Browse files

ARM: dts: exynos: Add labels to all existing power domains



Provide human readable names for all power domains defined in Exynos SoCs.

Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent dfaf06ba
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+7 −0
Original line number Diff line number Diff line
@@ -102,18 +102,21 @@
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C40 0x20>;
		#power-domain-cells = <0>;
		label = "MFC";
	};

	pd_g3d: g3d-power-domain@10023C60 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C60 0x20>;
		#power-domain-cells = <0>;
		label = "G3D";
	};

	pd_lcd0: lcd0-power-domain@10023C80 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C80 0x20>;
		#power-domain-cells = <0>;
		label = "LCD0";
	};

	pd_tv: tv-power-domain@10023C20 {
@@ -121,24 +124,28 @@
		reg = <0x10023C20 0x20>;
		#power-domain-cells = <0>;
		power-domains = <&pd_lcd0>;
		label = "TV";
	};

	pd_cam: cam-power-domain@10023C00 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C00 0x20>;
		#power-domain-cells = <0>;
		label = "CAM";
	};

	pd_gps: gps-power-domain@10023CE0 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023CE0 0x20>;
		#power-domain-cells = <0>;
		label = "GPS";
	};

	pd_gps_alive: gps-alive-power-domain@10023D00 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023D00 0x20>;
		#power-domain-cells = <0>;
		label = "GPS alive";
	};

	gic: interrupt-controller@10490000 {
+1 −0
Original line number Diff line number Diff line
@@ -86,6 +86,7 @@
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023CA0 0x20>;
		#power-domain-cells = <0>;
		label = "LCD1";
	};

	l2c: l2-cache-controller@10502000 {
+1 −0
Original line number Diff line number Diff line
@@ -172,6 +172,7 @@
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023CA0 0x20>;
		#power-domain-cells = <0>;
		label = "ISP";
	};

	l2c: l2-cache-controller@10502000 {
+3 −0
Original line number Diff line number Diff line
@@ -115,18 +115,21 @@
			compatible = "samsung,exynos4210-pd";
			reg = <0x10044000 0x20>;
			#power-domain-cells = <0>;
			label = "GSC";
		};

		pd_mfc: mfc-power-domain@10044040 {
			compatible = "samsung,exynos4210-pd";
			reg = <0x10044040 0x20>;
			#power-domain-cells = <0>;
			label = "MFC";
		};

		pd_disp1: disp1-power-domain@100440A0 {
			compatible = "samsung,exynos4210-pd";
			reg = <0x100440A0 0x20>;
			#power-domain-cells = <0>;
			label = "DISP1";
			clocks = <&clock CLK_FIN_PLL>,
				 <&clock CLK_MOUT_ACLK200_DISP1_SUB>,
				 <&clock CLK_MOUT_ACLK300_DISP1_SUB>;
+5 −0
Original line number Diff line number Diff line
@@ -277,6 +277,7 @@
			compatible = "samsung,exynos4210-pd";
			reg = <0x10044000 0x20>;
			#power-domain-cells = <0>;
			label = "GSC";
			clocks = <&clock CLK_FIN_PLL>,
				 <&clock CLK_MOUT_USER_ACLK300_GSCL>,
				 <&clock CLK_GSCL0>, <&clock CLK_GSCL1>;
@@ -287,6 +288,7 @@
			compatible = "samsung,exynos4210-pd";
			reg = <0x10044020 0x20>;
			#power-domain-cells = <0>;
			label = "ISP";
		};

		mfc_pd: power-domain@10044060 {
@@ -297,18 +299,21 @@
				 <&clock CLK_ACLK333>;
			clock-names = "oscclk", "clk0","asb0";
			#power-domain-cells = <0>;
			label = "MFC";
		};

		msc_pd: power-domain@10044120 {
			compatible = "samsung,exynos4210-pd";
			reg = <0x10044120 0x20>;
			#power-domain-cells = <0>;
			label = "MSC";
		};

		disp_pd: power-domain@100440C0 {
			compatible = "samsung,exynos4210-pd";
			reg = <0x100440C0 0x20>;
			#power-domain-cells = <0>;
			label = "DISP";
			clocks = <&clock CLK_FIN_PLL>,
				 <&clock CLK_MOUT_USER_ACLK200_DISP1>,
				 <&clock CLK_MOUT_USER_ACLK300_DISP1>,