Loading drivers/cam_cpas/cam_cpas_intf.c +20 −0 Original line number Diff line number Diff line Loading @@ -17,6 +17,7 @@ #include "cam_subdev.h" #include "cam_cpas_hw_intf.h" #include "cam_cpas_soc.h" #include "cam_cpas_api.h" #define CAM_CPAS_DEV_NAME "cam-cpas" #define CAM_CPAS_INTF_INITIALIZED() (g_cpas_intf && g_cpas_intf->probe_done) Loading Loading @@ -157,6 +158,25 @@ int cam_cpas_get_cpas_hw_version(uint32_t *hw_version) return 0; } int cam_cpas_get_camnoc_fifo_fill_level_info( uint32_t cpas_version, uint32_t client_handle) { int rc = 0; if (!CAM_CPAS_INTF_INITIALIZED()) { CAM_ERR(CAM_CPAS, "cpas intf not initialized"); return -ENODEV; } rc = cam_cpas_hw_get_camnoc_fill_level_info(cpas_version, client_handle); if (rc) CAM_ERR(CAM_CPAS, "Failed to dump fifo reg rc %d", rc); return rc; } int cam_cpas_get_hw_info(uint32_t *camera_family, struct cam_hw_version *camera_version, struct cam_hw_version *cpas_version, Loading drivers/cam_cpas/cpas_top/cam_cpastop_hw.c +92 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. */ #include <linux/delay.h> Loading Loading @@ -709,6 +709,97 @@ static int cam_cpastop_init_hw_version(struct cam_hw_info *cpas_hw, return 0; } int cam_cpas_hw_get_camnoc_fill_level_info( uint32_t cpas_version, uint32_t client_handle) { struct cam_camnoc_fifo_lvl_info *camnoc_reg_info; uint32_t val; if (!camnoc_info->fill_lvl_register) return -EFAULT; camnoc_reg_info = camnoc_info->fill_lvl_register; switch (cpas_version) { case CAM_CPAS_TITAN_175_V120: case CAM_CPAS_TITAN_175_V130: cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->IFE0_nRDI_maxwr_offset, true, &val); CAM_INFO(CAM_CPAS, "IFE0_nRDI_MAXWR_LOW offset 0x%x val 0x%x", camnoc_reg_info->IFE0_nRDI_maxwr_offset, val); cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->IFE1_nRDI_maxwr_offset, true, &val); CAM_INFO(CAM_CPAS, "IFE1_nRDI_MAXWR_LOW offset 0x%x val 0x%x", camnoc_reg_info->IFE1_nRDI_maxwr_offset, val); cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->IFE0123_RDI_maxwr_offset, true, &val); CAM_INFO(CAM_CPAS, "IFE0_nRDI_MAXWR_LOW offset 0x%x val 0x%x", camnoc_reg_info->IFE0123_RDI_maxwr_offset, val); break; case CAM_CPAS_TITAN_480_V100: cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->ife_linear, true, &val); CAM_INFO(CAM_CPAS, "ife_linear offset 0x%x val 0x%x", camnoc_reg_info->ife_linear, val); cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->ife_rdi_wr, true, &val); CAM_INFO(CAM_CPAS, "ife_rdi_wr offset 0x%x val 0x%x", camnoc_reg_info->ife_rdi_wr, val); cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->ife_ubwc_stats, true, &val); CAM_INFO(CAM_CPAS, "ife_ubwc_stats offset 0x%x val 0x%x", camnoc_reg_info->ife_ubwc_stats, val); break; case CAM_CPAS_TITAN_150_V100: case CAM_CPAS_TITAN_170_V100: case CAM_CPAS_TITAN_170_V110: case CAM_CPAS_TITAN_170_V120: case CAM_CPAS_TITAN_170_V200: case CAM_CPAS_TITAN_175_V100: case CAM_CPAS_TITAN_175_V101: cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->IFE02_MAXWR_LOW, true, &val); CAM_INFO(CAM_ISP, "IFE02_MAXWR_LOW offset 0x%x val 0x%x", camnoc_reg_info->IFE02_MAXWR_LOW, val); cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->IFE13_MAXWR_LOW, true, &val); CAM_INFO(CAM_ISP, "IFE13_MAXWR_LOW offset 0x%x val 0x%x", camnoc_reg_info->IFE13_MAXWR_LOW, val); break; default: CAM_ERR(CAM_CPAS, "Camera version not supported %d", cpas_version); break; } return 0; } int cam_cpastop_get_internal_ops(struct cam_cpas_internal_ops *internal_ops) { if (!internal_ops) { Loading drivers/cam_cpas/cpas_top/cam_cpastop_hw.h +24 −0 Original line number Diff line number Diff line Loading @@ -256,6 +256,28 @@ struct cam_camnoc_err_logger_info { uint32_t errlog3_high; }; /** * struct cam_camnoc_fifo_lvl_info : Struct for fifo fill level registers * @IFE0_nRDI_maxwr_offset: Register offset for fill level for IFE0 * @IFE1_nRDI_maxwr_offset: Register offset for fill level for IFE1 * @IFE0123_RDI_maxwr_low_offset: Register offset for RDI * @ife_linear: Register offset for ife linear * @ife_rdi_wr: Register offset for rdi wr * @ife_ubwc_stats: Register offset for ubwc stats * @IFE02_MAXWR_LOW: Register offset for IFE02 * @IFE13_MAXWR_LOW: Register offset for IFE13 */ struct cam_camnoc_fifo_lvl_info { uint32_t IFE0_nRDI_maxwr_offset; uint32_t IFE1_nRDI_maxwr_offset; uint32_t IFE0123_RDI_maxwr_offset; uint32_t ife_linear; uint32_t ife_rdi_wr; uint32_t ife_ubwc_stats; uint32_t IFE02_MAXWR_LOW; uint32_t IFE13_MAXWR_LOW; }; /** * struct cam_camnoc_info : Overall CAMNOC settings info * Loading @@ -266,6 +288,7 @@ struct cam_camnoc_err_logger_info { * @irq_err_size: Array size of IRQ Error settings * @err_logger: Pointer to CAMNOC IRQ Error logger read registers * @errata_wa_list: HW Errata workaround info * @fill_level_register: Fill level registers * */ struct cam_camnoc_info { Loading @@ -276,6 +299,7 @@ struct cam_camnoc_info { int irq_err_size; struct cam_camnoc_err_logger_info *err_logger; struct cam_cpas_hw_errata_wa_list *errata_wa_list; struct cam_camnoc_fifo_lvl_info *fill_lvl_register; }; /** Loading drivers/cam_cpas/cpas_top/cpastop_v150_100.h +7 −1 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. */ #ifndef _CPASTOP_V150_100_H_ Loading Loading @@ -515,6 +515,11 @@ static struct cam_cpas_hw_errata_wa_list cam150_cpas100_errata_wa_list = { }, }; struct cam_camnoc_fifo_lvl_info cam150_cpas100_camnoc_fifo_info = { .IFE02_MAXWR_LOW = 0x420, .IFE13_MAXWR_LOW = 0x820, }; static struct cam_camnoc_info cam150_cpas100_camnoc_info = { .specific = &cam_cpas_v150_100_camnoc_specific[0], .specific_size = sizeof(cam_cpas_v150_100_camnoc_specific) / Loading @@ -525,6 +530,7 @@ static struct cam_camnoc_info cam150_cpas100_camnoc_info = { sizeof(cam_cpas_v150_100_irq_err[0]), .err_logger = &cam150_cpas100_err_logger_offsets, .errata_wa_list = &cam150_cpas100_errata_wa_list, .fill_lvl_register = &cam150_cpas100_camnoc_fifo_info, }; #endif /* _CPASTOP_V150_100_H_ */ drivers/cam_cpas/cpas_top/cpastop_v170_110.h +7 −1 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. */ #ifndef _CPASTOP_V170_110_H_ Loading Loading @@ -523,6 +523,11 @@ static struct cam_cpas_hw_errata_wa_list cam170_cpas110_errata_wa_list = { }, }; struct cam_camnoc_fifo_lvl_info cam170_cpas110_camnoc_fifo_info = { .IFE02_MAXWR_LOW = 0x420, .IFE13_MAXWR_LOW = 0x820, }; static struct cam_camnoc_info cam170_cpas110_camnoc_info = { .specific = &cam_cpas110_camnoc_specific[0], .specific_size = sizeof(cam_cpas110_camnoc_specific) / Loading @@ -533,6 +538,7 @@ static struct cam_camnoc_info cam170_cpas110_camnoc_info = { sizeof(cam_cpas110_irq_err[0]), .err_logger = &cam170_cpas110_err_logger_offsets, .errata_wa_list = &cam170_cpas110_errata_wa_list, .fill_lvl_register = &cam170_cpas110_camnoc_fifo_info, }; #endif /* _CPASTOP_V170_110_H_ */ Loading
drivers/cam_cpas/cam_cpas_intf.c +20 −0 Original line number Diff line number Diff line Loading @@ -17,6 +17,7 @@ #include "cam_subdev.h" #include "cam_cpas_hw_intf.h" #include "cam_cpas_soc.h" #include "cam_cpas_api.h" #define CAM_CPAS_DEV_NAME "cam-cpas" #define CAM_CPAS_INTF_INITIALIZED() (g_cpas_intf && g_cpas_intf->probe_done) Loading Loading @@ -157,6 +158,25 @@ int cam_cpas_get_cpas_hw_version(uint32_t *hw_version) return 0; } int cam_cpas_get_camnoc_fifo_fill_level_info( uint32_t cpas_version, uint32_t client_handle) { int rc = 0; if (!CAM_CPAS_INTF_INITIALIZED()) { CAM_ERR(CAM_CPAS, "cpas intf not initialized"); return -ENODEV; } rc = cam_cpas_hw_get_camnoc_fill_level_info(cpas_version, client_handle); if (rc) CAM_ERR(CAM_CPAS, "Failed to dump fifo reg rc %d", rc); return rc; } int cam_cpas_get_hw_info(uint32_t *camera_family, struct cam_hw_version *camera_version, struct cam_hw_version *cpas_version, Loading
drivers/cam_cpas/cpas_top/cam_cpastop_hw.c +92 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. */ #include <linux/delay.h> Loading Loading @@ -709,6 +709,97 @@ static int cam_cpastop_init_hw_version(struct cam_hw_info *cpas_hw, return 0; } int cam_cpas_hw_get_camnoc_fill_level_info( uint32_t cpas_version, uint32_t client_handle) { struct cam_camnoc_fifo_lvl_info *camnoc_reg_info; uint32_t val; if (!camnoc_info->fill_lvl_register) return -EFAULT; camnoc_reg_info = camnoc_info->fill_lvl_register; switch (cpas_version) { case CAM_CPAS_TITAN_175_V120: case CAM_CPAS_TITAN_175_V130: cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->IFE0_nRDI_maxwr_offset, true, &val); CAM_INFO(CAM_CPAS, "IFE0_nRDI_MAXWR_LOW offset 0x%x val 0x%x", camnoc_reg_info->IFE0_nRDI_maxwr_offset, val); cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->IFE1_nRDI_maxwr_offset, true, &val); CAM_INFO(CAM_CPAS, "IFE1_nRDI_MAXWR_LOW offset 0x%x val 0x%x", camnoc_reg_info->IFE1_nRDI_maxwr_offset, val); cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->IFE0123_RDI_maxwr_offset, true, &val); CAM_INFO(CAM_CPAS, "IFE0_nRDI_MAXWR_LOW offset 0x%x val 0x%x", camnoc_reg_info->IFE0123_RDI_maxwr_offset, val); break; case CAM_CPAS_TITAN_480_V100: cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->ife_linear, true, &val); CAM_INFO(CAM_CPAS, "ife_linear offset 0x%x val 0x%x", camnoc_reg_info->ife_linear, val); cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->ife_rdi_wr, true, &val); CAM_INFO(CAM_CPAS, "ife_rdi_wr offset 0x%x val 0x%x", camnoc_reg_info->ife_rdi_wr, val); cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->ife_ubwc_stats, true, &val); CAM_INFO(CAM_CPAS, "ife_ubwc_stats offset 0x%x val 0x%x", camnoc_reg_info->ife_ubwc_stats, val); break; case CAM_CPAS_TITAN_150_V100: case CAM_CPAS_TITAN_170_V100: case CAM_CPAS_TITAN_170_V110: case CAM_CPAS_TITAN_170_V120: case CAM_CPAS_TITAN_170_V200: case CAM_CPAS_TITAN_175_V100: case CAM_CPAS_TITAN_175_V101: cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->IFE02_MAXWR_LOW, true, &val); CAM_INFO(CAM_ISP, "IFE02_MAXWR_LOW offset 0x%x val 0x%x", camnoc_reg_info->IFE02_MAXWR_LOW, val); cam_cpas_reg_read(client_handle, CAM_CPAS_REG_CAMNOC, camnoc_reg_info->IFE13_MAXWR_LOW, true, &val); CAM_INFO(CAM_ISP, "IFE13_MAXWR_LOW offset 0x%x val 0x%x", camnoc_reg_info->IFE13_MAXWR_LOW, val); break; default: CAM_ERR(CAM_CPAS, "Camera version not supported %d", cpas_version); break; } return 0; } int cam_cpastop_get_internal_ops(struct cam_cpas_internal_ops *internal_ops) { if (!internal_ops) { Loading
drivers/cam_cpas/cpas_top/cam_cpastop_hw.h +24 −0 Original line number Diff line number Diff line Loading @@ -256,6 +256,28 @@ struct cam_camnoc_err_logger_info { uint32_t errlog3_high; }; /** * struct cam_camnoc_fifo_lvl_info : Struct for fifo fill level registers * @IFE0_nRDI_maxwr_offset: Register offset for fill level for IFE0 * @IFE1_nRDI_maxwr_offset: Register offset for fill level for IFE1 * @IFE0123_RDI_maxwr_low_offset: Register offset for RDI * @ife_linear: Register offset for ife linear * @ife_rdi_wr: Register offset for rdi wr * @ife_ubwc_stats: Register offset for ubwc stats * @IFE02_MAXWR_LOW: Register offset for IFE02 * @IFE13_MAXWR_LOW: Register offset for IFE13 */ struct cam_camnoc_fifo_lvl_info { uint32_t IFE0_nRDI_maxwr_offset; uint32_t IFE1_nRDI_maxwr_offset; uint32_t IFE0123_RDI_maxwr_offset; uint32_t ife_linear; uint32_t ife_rdi_wr; uint32_t ife_ubwc_stats; uint32_t IFE02_MAXWR_LOW; uint32_t IFE13_MAXWR_LOW; }; /** * struct cam_camnoc_info : Overall CAMNOC settings info * Loading @@ -266,6 +288,7 @@ struct cam_camnoc_err_logger_info { * @irq_err_size: Array size of IRQ Error settings * @err_logger: Pointer to CAMNOC IRQ Error logger read registers * @errata_wa_list: HW Errata workaround info * @fill_level_register: Fill level registers * */ struct cam_camnoc_info { Loading @@ -276,6 +299,7 @@ struct cam_camnoc_info { int irq_err_size; struct cam_camnoc_err_logger_info *err_logger; struct cam_cpas_hw_errata_wa_list *errata_wa_list; struct cam_camnoc_fifo_lvl_info *fill_lvl_register; }; /** Loading
drivers/cam_cpas/cpas_top/cpastop_v150_100.h +7 −1 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. */ #ifndef _CPASTOP_V150_100_H_ Loading Loading @@ -515,6 +515,11 @@ static struct cam_cpas_hw_errata_wa_list cam150_cpas100_errata_wa_list = { }, }; struct cam_camnoc_fifo_lvl_info cam150_cpas100_camnoc_fifo_info = { .IFE02_MAXWR_LOW = 0x420, .IFE13_MAXWR_LOW = 0x820, }; static struct cam_camnoc_info cam150_cpas100_camnoc_info = { .specific = &cam_cpas_v150_100_camnoc_specific[0], .specific_size = sizeof(cam_cpas_v150_100_camnoc_specific) / Loading @@ -525,6 +530,7 @@ static struct cam_camnoc_info cam150_cpas100_camnoc_info = { sizeof(cam_cpas_v150_100_irq_err[0]), .err_logger = &cam150_cpas100_err_logger_offsets, .errata_wa_list = &cam150_cpas100_errata_wa_list, .fill_lvl_register = &cam150_cpas100_camnoc_fifo_info, }; #endif /* _CPASTOP_V150_100_H_ */
drivers/cam_cpas/cpas_top/cpastop_v170_110.h +7 −1 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. */ #ifndef _CPASTOP_V170_110_H_ Loading Loading @@ -523,6 +523,11 @@ static struct cam_cpas_hw_errata_wa_list cam170_cpas110_errata_wa_list = { }, }; struct cam_camnoc_fifo_lvl_info cam170_cpas110_camnoc_fifo_info = { .IFE02_MAXWR_LOW = 0x420, .IFE13_MAXWR_LOW = 0x820, }; static struct cam_camnoc_info cam170_cpas110_camnoc_info = { .specific = &cam_cpas110_camnoc_specific[0], .specific_size = sizeof(cam_cpas110_camnoc_specific) / Loading @@ -533,6 +538,7 @@ static struct cam_camnoc_info cam170_cpas110_camnoc_info = { sizeof(cam_cpas110_irq_err[0]), .err_logger = &cam170_cpas110_err_logger_offsets, .errata_wa_list = &cam170_cpas110_errata_wa_list, .fill_lvl_register = &cam170_cpas110_camnoc_fifo_info, }; #endif /* _CPASTOP_V170_110_H_ */