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Commit 547e8f52 authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo
Browse files

ARM: imx: add cpuidle support for i.mx6ul 



This patch enables cpuidle driver for i.MX6UL, it
reuses i.MX6SX's cpuidle driver, 3 levels of cpuidle
supported:

1. ARM WFI;
2. SOC in WAIT mode;
3. SOC in WAIT mode + ARM power off.

As i.MX6UL has cortex-A7 CORE with an internal L2
cache, so flushing it before powering down ARM platform
is necessary, flush_cache_all() in last step of cpu_suspend
has very small overhead, just call it to avoid cache
type check for different platforms.

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 6ae44aa6

arch/arm/mach-imx/cpuidle-imx6sx.c

+10 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
#include <linux/cpuidle.h>

#include <linux/cpu_pm.h>

#include <linux/module.h>

#include <asm/cacheflush.h>

#include <asm/cpuidle.h>

#include <asm/suspend.h>
@@ -17,6 +18,15 @@ 


static int imx6sx_idle_finish(unsigned long val)

{

	/*

	 * for Cortex-A7 which has an internal L2

	 * cache, need to flush it before powering

	 * down ARM platform, since flushing L1 cache

	 * here again has very small overhead, compared

	 * to adding conditional code for L2 cache type,

	 * just call flush_cache_all() is fine.

	 */

	flush_cache_all();

	cpu_do_idle();



	return 0;

arch/arm/mach-imx/mach-imx6ul.c

+3 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 
#include <asm/mach/map.h>



#include "common.h"

#include "cpuidle.h"



static void __init imx6ul_enet_clk_init(void)

{
@@ -79,6 +80,8 @@ static void __init imx6ul_init_irq(void) 


static void __init imx6ul_init_late(void)

{

	imx6sx_cpuidle_init();



	if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))

		platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);

}