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Commit 546a3521 authored by Heiko Stuebner's avatar Heiko Stuebner
Browse files

ARM: dts: rockchip: move rk3288 usbphy under the GRF node 



The rk3288 usbphy is completely enclosed in the general register files
and the updated binding allows it to be a subnode of the GRF now.
So move the node appropriately.

Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 4421db1c

arch/arm/boot/dts/rk3288.dtsi

+31 −32
Original line number Diff line number Diff line
@@ -832,6 +832,37 @@ 
			compatible = "rockchip,rk3288-io-voltage-domain";

			status = "disabled";

		};



		usbphy: usbphy {

			compatible = "rockchip,rk3288-usb-phy";

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";



			usbphy0: usb-phy@320 {

				#phy-cells = <0>;

				reg = <0x320>;

				clocks = <&cru SCLK_OTGPHY0>;

				clock-names = "phyclk";

				#clock-cells = <0>;

			};



			usbphy1: usb-phy@334 {

				#phy-cells = <0>;

				reg = <0x334>;

				clocks = <&cru SCLK_OTGPHY1>;

				clock-names = "phyclk";

				#clock-cells = <0>;

			};



			usbphy2: usb-phy@348 {

				#phy-cells = <0>;

				reg = <0x348>;

				clocks = <&cru SCLK_OTGPHY2>;

				clock-names = "phyclk";

				#clock-cells = <0>;

			};

		};

	};



	wdt: watchdog@ff800000 {
@@ -1085,38 +1116,6 @@ 
		};

	};



	usbphy: phy {

		compatible = "rockchip,rk3288-usb-phy";

		rockchip,grf = <&grf>;

		#address-cells = <1>;

		#size-cells = <0>;

		status = "disabled";



		usbphy0: usb-phy@320 {

			#phy-cells = <0>;

			reg = <0x320>;

			clocks = <&cru SCLK_OTGPHY0>;

			clock-names = "phyclk";

			#clock-cells = <0>;

		};



		usbphy1: usb-phy@334 {

			#phy-cells = <0>;

			reg = <0x334>;

			clocks = <&cru SCLK_OTGPHY1>;

			clock-names = "phyclk";

			#clock-cells = <0>;

		};



		usbphy2: usb-phy@348 {

			#phy-cells = <0>;

			reg = <0x348>;

			clocks = <&cru SCLK_OTGPHY2>;

			clock-names = "phyclk";

			#clock-cells = <0>;

		};

	};



	pinctrl: pinctrl {

		compatible = "rockchip,rk3288-pinctrl";

		rockchip,grf = <&grf>;