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Commit 541162ff authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'sunxi-dt-for-4.18' of...

Merge tag 'sunxi-dt-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt

Allwinner DT additions for 4.18

Here is our usual bunch of DT changes for our arm SoCs, with most
significantly:
  - MIPI-DSI support for the A33
  - NAND support for the A33
  - SMP support for the A83t
  - GMAC support for the R40
  - And some new boards: Olimex A20-SOM-EVB-eMMC, Nintendo NES and SuperNES
    Classic

* tag 'sunxi-dt-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux

:
  ARM: dts: sun7i: Add Olimex A20-SOM-EVB-eMMC board
  ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller
  ARM: dts: sun8i: r40: Add device node and RGMII pinmux node for GMAC
  ARM: dts: sun8i: r40: bananapi-m2-ultra: Sort device node dereferences
  ARM: dts: sun8i: Add enable-method for SMP support for the A83T SoC
  ARM: dts: sun8i: a83t: Add CCI-400 node
  ARM: dts: sun8i: Add R_CPUCFG device node for the A83T dtsi
  ARM: dts: sun8i: Add CPUCFG device node for A83T dtsi
  ARM: dts: nes: add Nintendo NES/SuperNES Classic Edition support
  ARM: dts: sun8i: a23/a33: declare NAND pins
  ARM: dts: sunxi: Add sid for a83t
  ARM: dts: sun8i: a33: Add the DSI-related nodes
  ARM: dts: sunxi: Change sun7i-a20-olimex-som204-evb to not use cd-inverted
  ARM: sun8i: v40: enable USB host ports for Banana Pi M2 Berry

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 8fcb4401 5d9ef839
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+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ Required properties:
- compatible: Should be one of the following:
  "allwinner,sun4i-a10-sid"
  "allwinner,sun7i-a20-sid"
  "allwinner,sun8i-a83t-sid"
  "allwinner,sun8i-h3-sid"
  "allwinner,sun50i-a64-sid"

+3 −0
Original line number Diff line number Diff line
@@ -966,6 +966,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
	sun7i-a20-m3.dtb \
	sun7i-a20-mk808c.dtb \
	sun7i-a20-olimex-som-evb.dtb \
	sun7i-a20-olimex-som-evb-emmc.dtb \
	sun7i-a20-olimex-som204-evb.dtb \
	sun7i-a20-olimex-som204-evb-emmc.dtb \
	sun7i-a20-olinuxino-lime.dtb \
@@ -1017,6 +1018,8 @@ dtb-$(CONFIG_MACH_SUN8I) += \
	sun8i-h3-orangepi-plus.dtb \
	sun8i-h3-orangepi-plus2e.dtb \
	sun8i-r16-bananapi-m2m.dtb \
	sun8i-r16-nintendo-nes-classic.dtb \
	sun8i-r16-nintendo-super-nes-classic.dtb \
	sun8i-r16-parrot.dtb \
	sun8i-r40-bananapi-m2-ultra.dtb \
	sun8i-v3s-licheepi-zero.dtb \
+37 −0
Original line number Diff line number Diff line
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree Source for A20-Olimex-SOM-EVB-eMMC Board
 *
 * Copyright (C) 2018 Olimex Ltd.
 *   Author: Stefan Mavrodiev <stefan@olimex.com>
 */

/dts-v1/;
#include "sun7i-a20-olimex-som-evb.dts"

/ {

	model = "Olimex A20-Olimex-SOM-EVB-eMMC";
	compatible = "olimex,a20-olimex-som-evb-emmc", "allwinner,sun7i-a20";

	mmc2_pwrseq: mmc2_pwrseq {
		compatible = "mmc-pwrseq-emmc";
		reset-gpios = <&pio 2 18 GPIO_ACTIVE_LOW>;
	};
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins_a>;
	vmmc-supply = <&reg_vcc3v3>;
	mmc-pwrseq = <&mmc2_pwrseq>;
	bus-width = <4>;
	non-removable;
	status = "okay";

	emmc: emmc@0 {
		reg = <0>;
		compatible = "mmc-card";
		broken-hpi;
	};
};
+1 −2
Original line number Diff line number Diff line
@@ -172,8 +172,7 @@
	pinctrl-0 = <&mmc0_pins_a>;
	vmmc-supply = <&reg_vcc3v3>;
	bus-width = <4>;
	cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>;
	cd-inverted;
	cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>;
	status = "okay";
};

+33 −0
Original line number Diff line number Diff line
@@ -198,6 +198,8 @@
			clock-names = "ahb", "mod";
			resets = <&ccu RST_BUS_NAND>;
			reset-names = "ahb";
			pinctrl-names = "default";
			pinctrl-0 = <&nand_pins &nand_pins_cs0 &nand_pins_rb0>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
@@ -315,6 +317,37 @@
				bias-pull-up;
			};

			nand_pins: nand-pins {
				pins = "PC0", "PC1", "PC2", "PC5",
				       "PC8", "PC9", "PC10", "PC11",
				       "PC12", "PC13", "PC14", "PC15";
				function = "nand0";
			};

			nand_pins_cs0: nand-pins-cs0 {
				pins = "PC4";
				function = "nand0";
				bias-pull-up;
			};

			nand_pins_cs1: nand-pins-cs1 {
				pins = "PC3";
				function = "nand0";
				bias-pull-up;
			};

			nand_pins_rb0: nand-pins-rb0 {
				pins = "PC6";
				function = "nand0";
				bias-pull-up;
			};

			nand_pins_rb1: nand-pins-rb1 {
				pins = "PC7";
				function = "nand0";
				bias-pull-up;
			};

			pwm0_pins: pwm0 {
				pins = "PH0";
				function = "pwm0";
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