Merge 2fceda73c6206e58f114ea52f995bed698d1718c on remote branch (5382f89f) · Commits · e / devices / android_kernel_oneplus_sm7250

asoc/codecs/bolero/bolero-cdc.c

+4 −0

Original line number	Original line	Diff line number	Diff line
	@@ -828,6 +828,10 @@ static int bolero_ssr_enable(struct device dev, void data)
	priv->component,		priv->component,
	BOLERO_MACRO_EVT_CLK_RESET, 0x0);		BOLERO_MACRO_EVT_CLK_RESET, 0x0);
	}		}

			if (priv->rsc_clk_cb)
			priv->rsc_clk_cb(priv->clk_dev, BOLERO_MACRO_EVT_SSR_GFMUX_UP);

	trace_printk("%s: clk count reset\n", __func__);		trace_printk("%s: clk count reset\n", __func__);
	regcache_cache_only(priv->regmap, false);		regcache_cache_only(priv->regmap, false);
	mutex_lock(&priv->clk_lock);		mutex_lock(&priv->clk_lock);

asoc/codecs/bolero/bolero-cdc.h

+2 −1

Original line number	Original line	Diff line number	Diff line
	@@ -52,7 +52,8 @@ enum {
	BOLERO_MACRO_EVT_CLK_RESET,		BOLERO_MACRO_EVT_CLK_RESET,
	BOLERO_MACRO_EVT_REG_WAKE_IRQ,		BOLERO_MACRO_EVT_REG_WAKE_IRQ,
	BOLERO_MACRO_EVT_RX_COMPANDER_SOFT_RST,		BOLERO_MACRO_EVT_RX_COMPANDER_SOFT_RST,
	BOLERO_MACRO_EVT_BCS_CLK_OFF		BOLERO_MACRO_EVT_BCS_CLK_OFF,
			BOLERO_MACRO_EVT_SSR_GFMUX_UP,
	};		};

	enum {		enum {

asoc/codecs/bolero/bolero-clk-rsc.c

+20 −10

Original line number	Original line	Diff line number	Diff line
	@@ -38,6 +38,7 @@ struct bolero_clk_rsc {
	int reg_seq_en_cnt;		int reg_seq_en_cnt;
	int va_tx_clk_cnt;		int va_tx_clk_cnt;
	bool dev_up;		bool dev_up;
			bool dev_up_gfmux;
	u32 num_fs_reg;		u32 num_fs_reg;
	u32 *fs_gen_seq;		u32 *fs_gen_seq;
	int default_clk_id[MAX_CLK];		int default_clk_id[MAX_CLK];
	@@ -65,10 +66,14 @@ static int bolero_clk_rsc_cb(struct device *dev, u16 event)
	}		}

	mutex_lock(&priv->rsc_clk_lock);		mutex_lock(&priv->rsc_clk_lock);
	if (event == BOLERO_MACRO_EVT_SSR_UP)		if (event == BOLERO_MACRO_EVT_SSR_UP) {
	priv->dev_up = true;		priv->dev_up = true;
	else if (event == BOLERO_MACRO_EVT_SSR_DOWN)		} else if (event == BOLERO_MACRO_EVT_SSR_DOWN) {
	priv->dev_up = false;		priv->dev_up = false;
			priv->dev_up_gfmux = false;
			} else if (event == BOLERO_MACRO_EVT_SSR_GFMUX_UP) {
			priv->dev_up_gfmux = true;
			}
	mutex_unlock(&priv->rsc_clk_lock);		mutex_unlock(&priv->rsc_clk_lock);

	return 0;		return 0;
	@@ -282,10 +287,12 @@ static int bolero_clk_rsc_mux1_clk_request(struct bolero_clk_rsc *priv,
	* care in DSP itself		* care in DSP itself
	*/		*/
	if (clk_id != VA_CORE_CLK) {		if (clk_id != VA_CORE_CLK) {
			if (priv->dev_up_gfmux) {
	iowrite32(0x1, clk_muxsel);		iowrite32(0x1, clk_muxsel);
	muxsel = ioread32(clk_muxsel);		muxsel = ioread32(clk_muxsel);
	trace_printk("%s: muxsel value after enable: %d\n",		trace_printk("%s: muxsel value after enable: %d\n",
	__func__, muxsel);		__func__, muxsel);
			}
	bolero_clk_rsc_mux0_clk_request(priv,		bolero_clk_rsc_mux0_clk_request(priv,
	default_clk_id,		default_clk_id,
	false);		false);
	@@ -313,12 +320,14 @@ static int bolero_clk_rsc_mux1_clk_request(struct bolero_clk_rsc *priv,
	* This configuration would be taken		* This configuration would be taken
	* care in DSP itself.		* care in DSP itself.
	*/		*/
			if (priv->dev_up_gfmux) {
	iowrite32(0x0, clk_muxsel);		iowrite32(0x0, clk_muxsel);
	muxsel = ioread32(clk_muxsel);		muxsel = ioread32(clk_muxsel);
	trace_printk("%s: muxsel value after disable: %d\n",		trace_printk("%s: muxsel value after disable: %d\n",
	__func__, muxsel);		__func__, muxsel);
	}		}
	}		}
			}
	if (priv->clk[clk_id + NPL_CLK_OFFSET])		if (priv->clk[clk_id + NPL_CLK_OFFSET])
	clk_disable_unprepare(		clk_disable_unprepare(
	priv->clk[clk_id + NPL_CLK_OFFSET]);		priv->clk[clk_id + NPL_CLK_OFFSET]);
	@@ -706,6 +715,7 @@ static int bolero_clk_rsc_probe(struct platform_device *pdev)
	}		}
	priv->dev = &pdev->dev;		priv->dev = &pdev->dev;
	priv->dev_up = true;		priv->dev_up = true;
			priv->dev_up_gfmux = true;
	mutex_init(&priv->rsc_clk_lock);		mutex_init(&priv->rsc_clk_lock);
	mutex_init(&priv->fs_gen_lock);		mutex_init(&priv->fs_gen_lock);
	dev_set_drvdata(&pdev->dev, priv);		dev_set_drvdata(&pdev->dev, priv);

asoc/codecs/bolero/va-macro.c

+8 −2

Original line number	Original line	Diff line number	Diff line
	@@ -727,14 +727,20 @@ static int va_macro_swrm_clock(void *handle, bool enable)
	if (va_priv->va_swr_clk_cnt && !va_priv->tx_swr_clk_cnt) {		if (va_priv->va_swr_clk_cnt && !va_priv->tx_swr_clk_cnt) {
	ret = va_macro_tx_va_mclk_enable(va_priv, regmap,		ret = va_macro_tx_va_mclk_enable(va_priv, regmap,
	VA_MCLK, enable);		VA_MCLK, enable);
	if (ret)		if (ret) {
			pm_runtime_mark_last_busy(va_priv->dev);
			pm_runtime_put_autosuspend(va_priv->dev);
	goto done;		goto done;
			}
	va_priv->va_clk_status++;		va_priv->va_clk_status++;
	} else {		} else {
	ret = va_macro_tx_va_mclk_enable(va_priv, regmap,		ret = va_macro_tx_va_mclk_enable(va_priv, regmap,
	TX_MCLK, enable);		TX_MCLK, enable);
	if (ret)		if (ret) {
			pm_runtime_mark_last_busy(va_priv->dev);
			pm_runtime_put_autosuspend(va_priv->dev);
	goto done;		goto done;
			}
	va_priv->tx_clk_status++;		va_priv->tx_clk_status++;
	}		}
	pm_runtime_mark_last_busy(va_priv->dev);		pm_runtime_mark_last_busy(va_priv->dev);

asoc/codecs/wcd-mbhc-v2.c

+0 −2

Original line number	Original line	Diff line number	Diff line
	@@ -415,7 +415,6 @@ static void wcd_mbhc_clr_and_turnon_hph_padac(struct wcd_mbhc *mbhc)
	&mbhc->hph_pa_dac_state)) {		&mbhc->hph_pa_dac_state)) {
	pr_debug("%s: HPHR clear flag and enable PA\n", __func__);		pr_debug("%s: HPHR clear flag and enable PA\n", __func__);
	WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_HPHR_PA_EN, 1);		WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_HPHR_PA_EN, 1);
	WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_HPHR_OCP_DET_EN, 1);
	pa_turned_on = true;		pa_turned_on = true;
	}		}
	mutex_unlock(&mbhc->hphr_pa_lock);		mutex_unlock(&mbhc->hphr_pa_lock);
	@@ -424,7 +423,6 @@ static void wcd_mbhc_clr_and_turnon_hph_padac(struct wcd_mbhc *mbhc)
	&mbhc->hph_pa_dac_state)) {		&mbhc->hph_pa_dac_state)) {
	pr_debug("%s: HPHL clear flag and enable PA\n", __func__);		pr_debug("%s: HPHL clear flag and enable PA\n", __func__);
	WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_HPHL_PA_EN, 1);		WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_HPHL_PA_EN, 1);
	WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_HPHL_OCP_DET_EN, 1);
	pa_turned_on = true;		pa_turned_on = true;
	}		}
	mutex_unlock(&mbhc->hphl_pa_lock);		mutex_unlock(&mbhc->hphl_pa_lock);