Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 53667c67 authored by Marc Zyngier's avatar Marc Zyngier Committed by Thomas Gleixner
Browse files

dt-bindings/gic-v3: Add documentation for MBI support 



Add the required properties to support the MBI feature on GICv3.

Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lkml.kernel.org/r/20180508121438.11301-10-marc.zyngier@arm.com
parent 38985351

Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt

+17 −0
Original line number Diff line number Diff line
@@ -57,6 +57,20 @@ Optional 
  occupied by the redistributors. Required if more than one such

  region is present.



- msi-controller: Boolean property. Identifies the node as an MSI

  controller. Only present if the Message Based Interrupt

  functionnality is being exposed by the HW, and the mbi-ranges

  property present.



- mbi-ranges: A list of pairs <intid span>, where "intid" is the first

  SPI of a range that can be used an MBI, and "span" the size of that

  range. Multiple ranges can be provided. Requires "msi-controller" to

  be set.



- mbi-alias: Address property. Base address of an alias of the GICD

  region containing only the {SET,CLR}SPI registers to be used if

  isolation is required, and if supported by the HW.



Sub-nodes:



PPI affinity can be expressed as a single "ppi-partitions" node,
@@ -99,6 +113,9 @@ Examples: 
		      <0x0 0x2c020000 0 0x2000>;	// GICV

		interrupts = <1 9 4>;



		msi-controller;

		mbi-ranges = <256 128>;



		gic-its@2c200000 {

			compatible = "arm,gic-v3-its";

			msi-controller;