Merge "serial: msm_geni_serial: Reduce wait for transfer delay" (5347ec32) · Commits · e / devices / android_kernel_oneplus_sm7250

drivers/platform/msm/qcom-geni-se.c

+11 −0

Original line number	Diff line number	Diff line
		@@ -1566,6 +1566,10 @@ void geni_se_dump_dbg_regs(struct se_geni_rsc rsc, void __iomem base,
		u32 se_dma_rx_len_in = 0;
		u32 se_dma_tx_len = 0;
		u32 se_dma_tx_len_in = 0;
		u32 geni_m_irq_en = 0;
		u32 geni_s_irq_en = 0;
		u32 geni_dma_tx_irq_en = 0;
		u32 geni_dma_rx_irq_en = 0;
		struct geni_se_device *geni_se_dev;

		if (!ipc)
		@@ -1596,6 +1600,10 @@ void geni_se_dump_dbg_regs(struct se_geni_rsc rsc, void __iomem base,
		se_dma_rx_len_in = geni_read_reg(base, SE_DMA_RX_LEN_IN);
		se_dma_tx_len = geni_read_reg(base, SE_DMA_TX_LEN);
		se_dma_tx_len_in = geni_read_reg(base, SE_DMA_TX_LEN_IN);
		geni_m_irq_en = geni_read_reg(base, SE_GENI_M_IRQ_EN);
		geni_s_irq_en = geni_read_reg(base, SE_GENI_S_IRQ_EN);
		geni_dma_tx_irq_en = geni_read_reg(base, SE_DMA_TX_IRQ_EN);
		geni_dma_rx_irq_en = geni_read_reg(base, SE_DMA_RX_IRQ_EN);

		GENI_SE_DBG(ipc, true, rsc->ctrl_dev,
		"%s: m_cmd0:0x%x, m_irq_status:0x%x, s_irq_status:0x%x, geni_status:0x%x, geni_ios:0x%x\n",
		@@ -1608,6 +1616,9 @@ void geni_se_dump_dbg_regs(struct se_geni_rsc rsc, void __iomem base,
		se_dma_dbg, m_cmd_ctrl, se_dma_rx_len, se_dma_rx_len_in);
		GENI_SE_DBG(ipc, true, rsc->ctrl_dev,
		"dma_txlen:0x%x, dma_txlen_in:0x%x\n", se_dma_tx_len, se_dma_tx_len_in);
		GENI_SE_DBG(ipc, false, NULL,
		"dma_txirq_en:0x%x, dma_rxirq_en:0x%x geni_m_irq_en:0x%x geni_s_irq_en:0x%x\n",
		geni_dma_tx_irq_en, geni_dma_rx_irq_en, geni_m_irq_en, geni_s_irq_en);
		}
		EXPORT_SYMBOL(geni_se_dump_dbg_regs);

drivers/tty/serial/msm_geni_serial.c

+16 −25

Original line number	Diff line number	Diff line
		@@ -115,8 +115,8 @@

		#define WAKEBYTE_TIMEOUT_MSEC (2000)
		#define WAIT_XFER_MAX_ITER (2)
		#define WAIT_XFER_MAX_TIMEOUT_US (10000)
		#define WAIT_XFER_MIN_TIMEOUT_US (9000)
		#define WAIT_XFER_MAX_TIMEOUT_US (150)
		#define WAIT_XFER_MIN_TIMEOUT_US (100)
		#define IPC_LOG_PWR_PAGES (10)
		#define IPC_LOG_MISC_PAGES (30)
		#define IPC_LOG_TX_RX_PAGES (30)
		@@ -509,7 +509,6 @@ static void wait_for_transfers_inflight(struct uart_port *uport)
		int iter = 0;
		struct msm_geni_serial_port *port = GET_DEV_PORT(uport);
		unsigned int geni_status;
		bool CTS, RX;

		geni_status = geni_read_reg_nolog(uport->membase, SE_GENI_STATUS);
		/* Possible stop rx is called before this. */
		@@ -526,19 +525,8 @@ static void wait_for_transfers_inflight(struct uart_port *uport)
		}
		}
		if (check_transfers_inflight(uport)) {
		u32 geni_status = geni_read_reg_nolog(uport->membase,
		SE_GENI_STATUS);
		u32 geni_ios = geni_read_reg_nolog(uport->membase, SE_GENI_IOS);
		u32 rx_fifo_status = geni_read_reg_nolog(uport->membase,
		SE_GENI_RX_FIFO_STATUS);
		u32 rx_dma =
		geni_read_reg_nolog(uport->membase, SE_DMA_RX_LEN_IN);
		CTS = geni_ios & BIT(1); // b[1] = UART CTS <- Peer RFR
		RX = geni_ios & BIT(0); // b[0] = UART RX <- Peer TX

		IPC_LOG_MSG(port->ipc_log_misc,
		"%s: geni=0x%x rx_fifo=0x%x rx_dma=0x%x, CTS_IO=%d, RX_IO=%d\n",
		__func__, geni_status, rx_fifo_status, rx_dma, CTS, RX);
		geni_se_dump_dbg_regs(&port->serial_rsc,
		uport->membase, port->ipc_log_misc);
		}
		}

		@@ -1421,16 +1409,20 @@ static void start_rx_sequencer(struct uart_port *uport)
		if (geni_status & S_GENI_CMD_ACTIVE) {
		if (port->xfer_mode == SE_DMA) {
		IPC_LOG_MSG(port->ipc_log_misc,
		"%s: GENI: 0x%x\n", __func__, geni_status);
		"%s: mapping rx dma GENI: 0x%x\n",
		__func__, geni_status);
		geni_se_rx_dma_start(uport->membase, DMA_RX_BUF_SIZE,
		&port->rx_dma);
		}
		msm_geni_serial_stop_rx(uport);
		}

		if (port->xfer_mode == SE_DMA)
		if (port->xfer_mode == SE_DMA) {
		IPC_LOG_MSG(port->ipc_log_misc,
		"%s. mapping rx dma\n", __func__);
		geni_se_rx_dma_start(uport->membase, DMA_RX_BUF_SIZE,
		&port->rx_dma);
		}

		/* Start RX with the RFR_OPEN to keep RFR in always ready state */
		geni_setup_s_cmd(uport->membase, UART_START_READ, geni_se_param);
		@@ -2002,6 +1994,8 @@ static bool handle_rx_dma_xfer(u32 s_irq_status, struct uart_port *uport)
		msm_geni_serial_handle_dma_rx(uport,
		drop_rx);
		if (!(dma_rx_status & RX_GENI_CANCEL_IRQ)) {
		IPC_LOG_MSG(msm_port->ipc_log_misc,
		"%s. mapping rx dma\n", __func__);
		geni_se_rx_dma_start(uport->membase,
		DMA_RX_BUF_SIZE, &msm_port->rx_dma);
		} else {
		@@ -2082,12 +2076,8 @@ static void msm_geni_serial_handle_isr(struct uart_port *uport,
		goto exit_geni_serial_isr;
		}

		if (m_irq_status & (M_IO_DATA_ASSERT_EN \| M_IO_DATA_DEASSERT_EN)) {
		if (m_irq_status & (M_IO_DATA_ASSERT_EN \| M_IO_DATA_DEASSERT_EN))
		uport->icount.cts++;
		IPC_LOG_MSG(msm_port->ipc_log_misc,
		"%s. cts counter:%d\n", __func__,
		uport->icount.cts);
		}

		if (s_irq_status & S_RX_FIFO_WR_ERR_EN) {
		uport->icount.overrun++;
		@@ -3586,6 +3576,7 @@ static int msm_geni_serial_runtime_suspend(struct device *dev)
		u32 geni_status = geni_read_reg_nolog(port->uport.membase,
		SE_GENI_STATUS);

		IPC_LOG_MSG(port->ipc_log_pwr, "%s: Start\n", __func__);
		wait_for_transfers_inflight(&port->uport);
		/*
		* Manual RFR On.
		@@ -3599,8 +3590,8 @@ static int msm_geni_serial_runtime_suspend(struct device *dev)
		__func__, ret);
		return -EBUSY;
		}
		geni_status = geni_read_reg_nolog(port->uport.membase, SE_GENI_STATUS);

		geni_status = geni_read_reg_nolog(port->uport.membase, SE_GENI_STATUS);
		if ((geni_status & M_GENI_CMD_ACTIVE))
		stop_tx_sequencer(&port->uport);

		@@ -3624,7 +3615,7 @@ static int msm_geni_serial_runtime_suspend(struct device *dev)
		port->edge_count = 0;
		enable_irq(port->wakeup_irq);
		}
		IPC_LOG_MSG(port->ipc_log_pwr, "%s:\n", __func__);
		IPC_LOG_MSG(port->ipc_log_pwr, "%s: End\n", __func__);
		__pm_relax(port->geni_wake);
		exit_runtime_suspend:
		return ret;