Merge "msm: ipa3: fix to cleanup the dma allocation" (533e6782) · Commits · e / devices / android_kernel_oneplus_sm7250

drivers/platform/msm/ipa/ipa_v3/ipa_hdr.c

+16 −4

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0-only
		/*
		* Copyright (c) 2012-2019,2021 The Linux Foundation. All rights reserved.
		* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
		*/

		#include "ipa_i.h"
		@@ -193,13 +194,13 @@ int __ipa_commit_hdr_v3_0(void)

		if (ipa3_generate_hdr_hw_tbl(&hdr_mem)) {
		IPAERR("fail to generate HDR HW TBL\n");
		goto end;
		goto failure_hdr;
		}

		if (ipa3_generate_hdr_proc_ctx_hw_tbl(hdr_mem.phys_base, &ctx_mem,
		&aligned_ctx_mem)) {
		IPAERR("fail to generate HDR PROC CTX HW TBL\n");
		goto end;
		goto failure_hdr_proc;
		}

		/* IC to close the coal frame before HPS Clear if coal is enabled */
		@@ -324,7 +325,7 @@ int __ipa_commit_hdr_v3_0(void)
		IPAERR("fail to send immediate command\n");
		else
		rc = 0;

		end:
		if (ipa3_ctx->hdr_tbl_lcl) {
		dma_free_coherent(ipa3_ctx->pdev, hdr_mem.size, hdr_mem.base,
		hdr_mem.phys_base);
		@@ -336,6 +337,9 @@ int __ipa_commit_hdr_v3_0(void)
		ipa3_ctx->hdr_mem.base,
		ipa3_ctx->hdr_mem.phys_base);
		ipa3_ctx->hdr_mem = hdr_mem;
		} else {
		dma_free_coherent(ipa3_ctx->pdev, hdr_mem.size,
		hdr_mem.base, hdr_mem.phys_base);
		}
		}

		@@ -350,10 +354,12 @@ int __ipa_commit_hdr_v3_0(void)
		ipa3_ctx->hdr_proc_ctx_mem.base,
		ipa3_ctx->hdr_proc_ctx_mem.phys_base);
		ipa3_ctx->hdr_proc_ctx_mem = ctx_mem;
		} else {
		dma_free_coherent(ipa3_ctx->pdev, ctx_mem.size,
		ctx_mem.base, ctx_mem.phys_base);
		}
		}

		end:
		if (coal_cmd_pyld)
		ipahal_destroy_imm_cmd(coal_cmd_pyld);

		@@ -364,6 +370,12 @@ int __ipa_commit_hdr_v3_0(void)
		ipahal_destroy_imm_cmd(hdr_cmd_pyld);

		return rc;

		failure_hdr_proc:
		dma_free_coherent(ipa3_ctx->pdev, hdr_mem.size, hdr_mem.base,
		hdr_mem.phys_base);
		failure_hdr:
		return rc;
		}

		static int __ipa_add_hdr_proc_ctx(struct ipa_hdr_proc_ctx_add *proc_ctx,