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Commit 527dcdcc authored by David Howells's avatar David Howells
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Disintegrate asm/system.h for PA-RISC



Disintegrate asm/system.h for PA-RISC.

Signed-off-by: default avatarDavid Howells <dhowells@redhat.com>
cc: linux-parisc@vger.kernel.org
parent 1c80f22f
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#define _ASM_PARISC_ATOMIC_H_

#include <linux/types.h>
#include <asm/system.h>

/*
 * Atomic operations that C can't guarantee us.  Useful for
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#ifndef __PARISC_BARRIER_H
#define __PARISC_BARRIER_H

/*
** This is simply the barrier() macro from linux/kernel.h but when serial.c
** uses tqueue.h uses smp_mb() defined using barrier(), linux/kernel.h
** hasn't yet been included yet so it fails, thus repeating the macro here.
**
** PA-RISC architecture allows for weakly ordered memory accesses although
** none of the processors use it. There is a strong ordered bit that is
** set in the O-bit of the page directory entry. Operating systems that
** can not tolerate out of order accesses should set this bit when mapping
** pages. The O-bit of the PSW should also be set to 1 (I don't believe any
** of the processor implemented the PSW O-bit). The PCX-W ERS states that
** the TLB O-bit is not implemented so the page directory does not need to
** have the O-bit set when mapping pages (section 3.1). This section also
** states that the PSW Y, Z, G, and O bits are not implemented.
** So it looks like nothing needs to be done for parisc-linux (yet).
** (thanks to chada for the above comment -ggg)
**
** The __asm__ op below simple prevents gcc/ld from reordering
** instructions across the mb() "call".
*/
#define mb()		__asm__ __volatile__("":::"memory")	/* barrier() */
#define rmb()		mb()
#define wmb()		mb()
#define smp_mb()	mb()
#define smp_rmb()	mb()
#define smp_wmb()	mb()
#define smp_read_barrier_depends()	do { } while(0)
#define read_barrier_depends()		do { } while(0)

#define set_mb(var, value)		do { var = value; mb(); } while (0)

#endif /* __PARISC_BARRIER_H */
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#ifndef _PARISC_DELAY_H
#define _PARISC_DELAY_H

#include <asm/system.h>    /* for mfctl() */
#include <asm/special_insns.h>    /* for mfctl() */
#include <asm/processor.h> /* for boot_cpu_data */


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@@ -9,7 +9,6 @@
#define _ASM_DMA_H

#include <asm/io.h>		/* need byte IO */
#include <asm/system.h>	

#define dma_outb	outb
#define dma_inb		inb
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#ifndef __PARISC_EXEC_H
#define __PARISC_EXEC_H

#define arch_align_stack(x) (x)

#endif /* __PARISC_EXEC_H */
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