Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 517c3812 authored by Viswanadha Raju Thotakura's avatar Viswanadha Raju Thotakura
Browse files

msm: camera: Add support for enabling DSx, stats and input select 



DSx, stats and input select are part of core config registers.
Add support to enable them.

Change-Id: I8e7ea618a57c235d23c4fb65c9fce8087f153cbc
Signed-off-by: default avatarViswanadha Raju Thotakura <viswanad@codeaurora.org>
parent eaab7394

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c

+59 −1
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@ 
	(CAM_ISP_PACKET_META_GENERIC_BLOB_COMMON + 1)



#define CAM_ISP_GENERIC_BLOB_TYPE_MAX               \

	(CAM_ISP_GENERIC_BLOB_TYPE_UBWC_CONFIG_V2 + 1)

	(CAM_ISP_GENERIC_BLOB_TYPE_IFE_CORE_CONFIG + 1)



static uint32_t blob_type_hw_cmd_map[CAM_ISP_GENERIC_BLOB_TYPE_MAX] = {

	CAM_ISP_HW_CMD_GET_HFR_UPDATE,
@@ -3600,6 +3600,54 @@ static int cam_isp_blob_csid_clock_update( 
	return rc;

}



static int cam_isp_blob_core_cfg_update(

	uint32_t                               blob_type,

	struct cam_isp_generic_blob_info      *blob_info,

	struct cam_isp_core_config            *core_config,

	struct cam_hw_prepare_update_args     *prepare)

{

	struct cam_ife_hw_mgr_ctx             *ctx = NULL;

	struct cam_ife_hw_mgr_res             *hw_mgr_res;

	struct cam_hw_intf                    *hw_intf;

	uint64_t                               clk_rate = 0;

	int                                    rc = -EINVAL, i;

	struct cam_vfe_core_config_args        vfe_core_config;



	ctx = prepare->ctxt_to_hw_map;



	list_for_each_entry(hw_mgr_res, &ctx->res_list_ife_src, list) {

		for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) {

			clk_rate = 0;

			if (!hw_mgr_res->hw_res[i] ||

				hw_mgr_res->res_id != CAM_ISP_HW_VFE_IN_CAMIF)

				continue;



			hw_intf = hw_mgr_res->hw_res[i]->hw_intf;

			if (hw_intf && hw_intf->hw_ops.process_cmd) {

				vfe_core_config.node_res =

					hw_mgr_res->hw_res[i];



				memcpy(&vfe_core_config.core_config,

					core_config,

					sizeof(struct cam_isp_core_config));



				rc = hw_intf->hw_ops.process_cmd(

					hw_intf->hw_priv,

					CAM_ISP_HW_CMD_CORE_CONFIG,

					&vfe_core_config,

					sizeof(

					struct cam_vfe_core_config_args));

				if (rc)

					CAM_ERR(CAM_ISP, "Core cfg parse fail");

			} else {

				CAM_WARN(CAM_ISP, "NULL hw_intf!");

			}

		}

	}



	return rc;

}



static int cam_isp_blob_clock_update(

	uint32_t                               blob_type,

	struct cam_isp_generic_blob_info      *blob_info,
@@ -3939,6 +3987,16 @@ static int cam_isp_packet_generic_blob_handler(void *user_data, 
			CAM_ERR(CAM_ISP, "FS Update Failed rc: %d", rc);

	}

		break;

	case CAM_ISP_GENERIC_BLOB_TYPE_IFE_CORE_CONFIG: {

		struct cam_isp_core_config *core_config =

			(struct cam_isp_core_config *)blob_data;



		rc = cam_isp_blob_core_cfg_update(blob_type, blob_info,

			core_config, prepare);

		if (rc)

			CAM_ERR(CAM_ISP, "Core cfg update fail: %d", rc);

	}

		break;



	default:

		CAM_WARN(CAM_ISP, "Invalid blob type %d", blob_type);

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/include/cam_isp_hw.h

+1 −0
Original line number Diff line number Diff line
@@ -98,6 +98,7 @@ enum cam_isp_hw_cmd_type { 
	CAM_ISP_HW_CMD_FE_UPDATE_IN_RD,

	CAM_ISP_HW_CMD_FE_UPDATE_BUS_RD,

	CAM_ISP_HW_CMD_UBWC_UPDATE_V2,

	CAM_ISP_HW_CMD_CORE_CONFIG,

	CAM_ISP_HW_CMD_MAX,

};

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/include/cam_vfe_hw_intf.h

+11 −0
Original line number Diff line number Diff line
@@ -182,6 +182,17 @@ struct cam_vfe_clock_update_args { 
	uint64_t                           clk_rate;

};



/*

 * struct cam_vfe_core_config_args:

 *

 * @node_res:                Resource to get the time stamp

 * @core_config:             Core config for IFE

 */

struct cam_vfe_core_config_args {

	struct cam_isp_resource_node      *node_res;

	struct cam_isp_core_config         core_config;

};



/*

 * struct cam_vfe_bw_update_args:

 *

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/cam_vfe_core.c

+1 −0
Original line number Diff line number Diff line
@@ -581,6 +581,7 @@ int cam_vfe_process_cmd(void *hw_priv, uint32_t cmd_type, 
	case CAM_ISP_HW_CMD_CLOCK_UPDATE:

	case CAM_ISP_HW_CMD_BW_UPDATE:

	case CAM_ISP_HW_CMD_BW_CONTROL:

	case CAM_ISP_HW_CMD_CORE_CONFIG:

		rc = core_info->vfe_top->hw_ops.process_cmd(

			core_info->vfe_top->top_priv, cmd_type, cmd_args,

			arg_size);

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_camif_lite_ver3.c

+41 −1
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ struct cam_vfe_mux_camif_lite_data { 
	struct cam_vfe_camif_lite_ver3_reg_data     *reg_data;

	struct cam_hw_soc_info                      *soc_info;

	enum cam_isp_hw_sync_mode                    sync_mode;

	struct cam_vfe_camif_common_cfg              cam_common_cfg;



	cam_hw_mgr_event_cb_func                     event_cb;

	void                                        *priv;
@@ -266,8 +267,11 @@ static int cam_vfe_camif_lite_resource_start( 
		rsrc_data->sync_mode == CAM_ISP_HW_SYNC_SLAVE)

		val |= (1 << rsrc_data->reg_data->extern_reg_update_shift);



	if (camif_lite_res->res_id == CAM_ISP_HW_VFE_IN_PDLIB)

	if (camif_lite_res->res_id == CAM_ISP_HW_VFE_IN_PDLIB) {

		val |= (1 << rsrc_data->reg_data->operating_mode_shift);

		val |= (rsrc_data->cam_common_cfg.input_mux_sel_pdaf & 0x1) <<

			CAM_SHIFT_TOP_CORE_CFG_MUXSEL_PDAF;

	}



	cam_io_w_mb(val, rsrc_data->mem_base +

		rsrc_data->common_reg->core_cfg_0);
@@ -383,6 +387,39 @@ static int cam_vfe_camif_lite_resource_stop( 
	return rc;

}



static int cam_vfe_camif_lite_ver3_core_config(

	struct cam_isp_resource_node *rsrc_node, void *cmd_args)

{

	struct cam_vfe_mux_camif_lite_data *camif_lite_priv;

	struct cam_vfe_core_config_args *vfe_core_cfg =

		(struct cam_vfe_core_config_args *)cmd_args;



	camif_lite_priv =

		(struct cam_vfe_mux_camif_lite_data *)rsrc_node->res_priv;

	camif_lite_priv->cam_common_cfg.vid_ds16_r2pd =

		vfe_core_cfg->core_config.vid_ds16_r2pd;

	camif_lite_priv->cam_common_cfg.vid_ds4_r2pd =

		vfe_core_cfg->core_config.vid_ds4_r2pd;

	camif_lite_priv->cam_common_cfg.disp_ds16_r2pd =

		vfe_core_cfg->core_config.disp_ds16_r2pd;

	camif_lite_priv->cam_common_cfg.disp_ds4_r2pd =

		vfe_core_cfg->core_config.disp_ds4_r2pd;

	camif_lite_priv->cam_common_cfg.dsp_streaming_tap_point =

		vfe_core_cfg->core_config.dsp_streaming_tap_point;

	camif_lite_priv->cam_common_cfg.ihist_src_sel =

		vfe_core_cfg->core_config.ihist_src_sel;

	camif_lite_priv->cam_common_cfg.hdr_be_src_sel =

		vfe_core_cfg->core_config.hdr_be_src_sel;

	camif_lite_priv->cam_common_cfg.hdr_bhist_src_sel =

		vfe_core_cfg->core_config.hdr_bhist_src_sel;

	camif_lite_priv->cam_common_cfg.input_mux_sel_pdaf =

		vfe_core_cfg->core_config.input_mux_sel_pdaf;

	camif_lite_priv->cam_common_cfg.input_mux_sel_pp =

		vfe_core_cfg->core_config.input_mux_sel_pp;



	return 0;

}



static int cam_vfe_camif_lite_process_cmd(

	struct cam_isp_resource_node *rsrc_node,

	uint32_t cmd_type, void *cmd_args, uint32_t arg_size)
@@ -399,6 +436,9 @@ static int cam_vfe_camif_lite_process_cmd( 
		rc = cam_vfe_camif_lite_get_reg_update(rsrc_node, cmd_args,

			arg_size);

		break;

	case CAM_ISP_HW_CMD_CORE_CONFIG:

		rc = cam_vfe_camif_lite_ver3_core_config(rsrc_node, cmd_args);

		break;

	default:

		CAM_ERR(CAM_ISP,

			"unsupported process command:%d", cmd_type);