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Commit 511e6bc0 authored by huangdaode's avatar huangdaode Committed by David S. Miller
Browse files

net: add Hisilicon Network Subsystem DSAF support



DSAF, namely Distributed System Area Fabric, is one of the HNS
acceleration engine implementation. This patch add DSAF driver to the
system.

hns_ae_adapt: the adaptor for registering the driver to HNAE framework
hns_dsaf_mac: MAC cover interface for GE and XGE
hns_dsaf_gmac: GE (10/100/1000G Ethernet) MAC function
hns_dsaf_xgmac: XGE (10000+G Ethernet) MAC function
hns_dsaf_main: the platform device driver for the whole hardware
hns_dsaf_misc: some misc helper function, such as LED support
hns_dsaf_ppe: packet process engine function
hns_dsaf_rcb: ring buffer function

Signed-off-by: default avatarhuangdaode <huangdaode@hisilicon.com>
Signed-off-by: default avatarYisen Zhuang <Yisen.Zhuang@huawei.com>
Signed-off-by: default avatarKenneth Lee <liguozhu@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 6fe6611f
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@@ -46,4 +46,13 @@ config HNS
	  is needed by any driver which provides HNS acceleration engine or make
	  use of the engine

config HNS_DSAF
	tristate "Hisilicon HNS DSAF device Support"
	select HNS
	select HNS_MDIO
	---help---
	  This selects the DSAF (Distributed System Area Frabric) network
	  acceleration engine support. The engine is used in Hisilicon hip05,
	  Hi1610 and further ICT SoC

endif # NET_VENDOR_HISILICON
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@@ -3,3 +3,7 @@
#

obj-$(CONFIG_HNS) += hnae.o

obj-$(CONFIG_HNS_DSAF) += hns_dsaf.o
hns_dsaf-objs = hns_ae_adapt.o hns_dsaf_gmac.o hns_dsaf_mac.o hns_dsaf_misc.o \
	hns_dsaf_main.o hns_dsaf_ppe.o hns_dsaf_rcb.o hns_dsaf_xgmac.o
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/*
 * Copyright (c) 2014-2015 Hisilicon Limited.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#ifndef _HNS_GMAC_H
#define _HNS_GMAC_H

#include "hns_dsaf_mac.h"

enum hns_port_mode {
	GMAC_10M_MII = 0,
	GMAC_100M_MII,
	GMAC_1000M_GMII,
	GMAC_10M_RGMII,
	GMAC_100M_RGMII,
	GMAC_1000M_RGMII,
	GMAC_10M_SGMII,
	GMAC_100M_SGMII,
	GMAC_1000M_SGMII,
	GMAC_10000M_SGMII	/* 10GE */
};

enum hns_gmac_duplex_mdoe {
	GMAC_HALF_DUPLEX_MODE = 0,
	GMAC_FULL_DUPLEX_MODE
};

struct hns_gmac_port_mode_cfg {
	enum hns_port_mode port_mode;
	u32 max_frm_size;
	u32 short_runts_thr;
	u32 pad_enable;
	u32 crc_add;
	u32 an_enable;	/*auto-nego enable  */
	u32 runt_pkt_en;
	u32 strip_pad_en;
};

#define ETH_GMAC_DUMP_NUM		96
#endif				/* __HNS_GMAC_H__ */
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