Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 51190667 authored by Jesse Barnes's avatar Jesse Barnes Committed by Chris Wilson
Browse files

drm/i915/dp: correct eDP lane count and bpp 



With the old check we'd never set lane_count or bpp to different values
on PCH attached eDP panels.

Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 4d926461

drivers/gpu/drm/i915/intel_dp.c

+4 −2
Original line number Diff line number Diff line
@@ -672,7 +672,9 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, 
		intel_dp = enc_to_intel_dp(encoder);

		if (intel_dp->base.type == INTEL_OUTPUT_DISPLAYPORT) {

			lane_count = intel_dp->lane_count;

			if (is_pch_edp(intel_dp))

			break;

		} else if (is_edp(intel_dp)) {

			lane_count = dev_priv->edp.lanes;

			bpp = dev_priv->edp.bpp;

			break;

		}