Loading MAINTAINERS +2 −0 Original line number Diff line number Diff line Loading @@ -3086,6 +3086,7 @@ M: Stephen Boyd <sboyd@codeaurora.org> L: linux-clk@vger.kernel.org T: git git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git S: Maintained F: Documentation/devicetree/bindings/clock/ F: drivers/clk/ X: drivers/clk/clkdev.c F: include/linux/clk-pr* Loading Loading @@ -8008,6 +8009,7 @@ Q: http://patchwork.kernel.org/project/linux-wireless/list/ T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next.git S: Maintained F: Documentation/devicetree/bindings/net/wireless/ F: drivers/net/wireless/ NETXEN (1/10) GbE SUPPORT Loading arch/arc/Kconfig +4 −27 Original line number Diff line number Diff line Loading @@ -61,7 +61,7 @@ config RWSEM_GENERIC_SPINLOCK def_bool y config ARCH_DISCONTIGMEM_ENABLE def_bool y def_bool n config ARCH_FLATMEM_ENABLE def_bool y Loading Loading @@ -186,9 +186,6 @@ if SMP config ARC_HAS_COH_CACHES def_bool n config ARC_HAS_REENTRANT_IRQ_LV2 def_bool n config ARC_MCIP bool "ARConnect Multicore IP (MCIP) Support " depends on ISA_ARCV2 Loading Loading @@ -366,25 +363,10 @@ config NODES_SHIFT if ISA_ARCOMPACT config ARC_COMPACT_IRQ_LEVELS bool "ARCompact IRQ Priorities: High(2)/Low(1)" bool "Setup Timer IRQ as high Priority" default n # Timer HAS to be high priority, for any other high priority config select ARC_IRQ3_LV2 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2 if ARC_COMPACT_IRQ_LEVELS config ARC_IRQ3_LV2 bool config ARC_IRQ5_LV2 bool config ARC_IRQ6_LV2 bool endif #ARC_COMPACT_IRQ_LEVELS depends on !SMP config ARC_FPU_SAVE_RESTORE bool "Enable FPU state persistence across context switch" Loading @@ -407,11 +389,6 @@ config ARC_HAS_LLSC default y depends on !ARC_CANT_LLSC config ARC_STAR_9000923308 bool "Workaround for llock/scond livelock" default n depends on ISA_ARCV2 && SMP && ARC_HAS_LLSC config ARC_HAS_SWAPE bool "Insn: SWAPE (endian-swap)" default y Loading Loading @@ -471,7 +448,7 @@ config LINUX_LINK_BASE config HIGHMEM bool "High Memory Support" select DISCONTIGMEM select ARCH_DISCONTIGMEM_ENABLE help With ARC 2G:2G address split, only upper 2G is directly addressable by kernel. Enable this to potentially allow access to rest of 2G and PAE Loading arch/arc/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -127,7 +127,7 @@ libs-y += arch/arc/lib/ $(LIBGCC) boot := arch/arc/boot #default target for make without any arguements. #default target for make without any arguments. KBUILD_IMAGE := bootpImage all: $(KBUILD_IMAGE) Loading arch/arc/boot/dts/abilis_tb100.dtsi +0 −2 Original line number Diff line number Diff line Loading @@ -23,8 +23,6 @@ / { clock-frequency = <500000000>; /* 500 MHZ */ soc100 { bus-frequency = <166666666>; Loading arch/arc/boot/dts/abilis_tb101.dtsi +0 −2 Original line number Diff line number Diff line Loading @@ -23,8 +23,6 @@ / { clock-frequency = <500000000>; /* 500 MHZ */ soc100 { bus-frequency = <166666666>; Loading Loading
MAINTAINERS +2 −0 Original line number Diff line number Diff line Loading @@ -3086,6 +3086,7 @@ M: Stephen Boyd <sboyd@codeaurora.org> L: linux-clk@vger.kernel.org T: git git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git S: Maintained F: Documentation/devicetree/bindings/clock/ F: drivers/clk/ X: drivers/clk/clkdev.c F: include/linux/clk-pr* Loading Loading @@ -8008,6 +8009,7 @@ Q: http://patchwork.kernel.org/project/linux-wireless/list/ T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next.git S: Maintained F: Documentation/devicetree/bindings/net/wireless/ F: drivers/net/wireless/ NETXEN (1/10) GbE SUPPORT Loading
arch/arc/Kconfig +4 −27 Original line number Diff line number Diff line Loading @@ -61,7 +61,7 @@ config RWSEM_GENERIC_SPINLOCK def_bool y config ARCH_DISCONTIGMEM_ENABLE def_bool y def_bool n config ARCH_FLATMEM_ENABLE def_bool y Loading Loading @@ -186,9 +186,6 @@ if SMP config ARC_HAS_COH_CACHES def_bool n config ARC_HAS_REENTRANT_IRQ_LV2 def_bool n config ARC_MCIP bool "ARConnect Multicore IP (MCIP) Support " depends on ISA_ARCV2 Loading Loading @@ -366,25 +363,10 @@ config NODES_SHIFT if ISA_ARCOMPACT config ARC_COMPACT_IRQ_LEVELS bool "ARCompact IRQ Priorities: High(2)/Low(1)" bool "Setup Timer IRQ as high Priority" default n # Timer HAS to be high priority, for any other high priority config select ARC_IRQ3_LV2 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2 if ARC_COMPACT_IRQ_LEVELS config ARC_IRQ3_LV2 bool config ARC_IRQ5_LV2 bool config ARC_IRQ6_LV2 bool endif #ARC_COMPACT_IRQ_LEVELS depends on !SMP config ARC_FPU_SAVE_RESTORE bool "Enable FPU state persistence across context switch" Loading @@ -407,11 +389,6 @@ config ARC_HAS_LLSC default y depends on !ARC_CANT_LLSC config ARC_STAR_9000923308 bool "Workaround for llock/scond livelock" default n depends on ISA_ARCV2 && SMP && ARC_HAS_LLSC config ARC_HAS_SWAPE bool "Insn: SWAPE (endian-swap)" default y Loading Loading @@ -471,7 +448,7 @@ config LINUX_LINK_BASE config HIGHMEM bool "High Memory Support" select DISCONTIGMEM select ARCH_DISCONTIGMEM_ENABLE help With ARC 2G:2G address split, only upper 2G is directly addressable by kernel. Enable this to potentially allow access to rest of 2G and PAE Loading
arch/arc/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -127,7 +127,7 @@ libs-y += arch/arc/lib/ $(LIBGCC) boot := arch/arc/boot #default target for make without any arguements. #default target for make without any arguments. KBUILD_IMAGE := bootpImage all: $(KBUILD_IMAGE) Loading
arch/arc/boot/dts/abilis_tb100.dtsi +0 −2 Original line number Diff line number Diff line Loading @@ -23,8 +23,6 @@ / { clock-frequency = <500000000>; /* 500 MHZ */ soc100 { bus-frequency = <166666666>; Loading
arch/arc/boot/dts/abilis_tb101.dtsi +0 −2 Original line number Diff line number Diff line Loading @@ -23,8 +23,6 @@ / { clock-frequency = <500000000>; /* 500 MHZ */ soc100 { bus-frequency = <166666666>; Loading