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Commit 50980939 authored by Mayank Rana's avatar Mayank Rana Committed by Hemant Kumar
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dwc3: core: Add ssp u3 u0 link state related quirk 



USB PHY (qmp super speed phy) is unable to consistently move between
the u3 (p3)/u0(p0) states causing controller and phy link level issues
resulting in device re-enumeration. Fix the issue by forcing qmp phy to
move to P2 state always before moving to P0 from P3 state. Forcing by
phy link state is done by enabling Ux_exit_in_Px (BIT:27) and P3ExSigP2
(BIT:10) of GUSB3PIPECTL register.

Change-Id: I1edd6c77769d3139863413eed82f2b8b98b33d42
Signed-off-by: default avatarMayank Rana <mrana@codeaurora.org>
Signed-off-by: default avatarHemant Kumar <hemantk@codeaurora.org>
parent b5b8e428

Documentation/devicetree/bindings/usb/dwc3.txt

+2 −0
Original line number Diff line number Diff line
@@ -71,6 +71,8 @@ Optional properties: 
			during HS transmit.

 - snps,dis_metastability_quirk: when set, disable metastability workaround.

			CAUTION: use only if you are absolutely sure of it.

 - snps,ssp-u3-u0-quirk: when set, core always changes PHY power state

                        to P2, before attempting a U3 exit handshake.

 - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal

			utmi_l1_suspend_n, false when asserts utmi_sleep_n

 - snps,hird-threshold: HIRD threshold

drivers/usb/dwc3/core.c

+6 −0
Original line number Diff line number Diff line
@@ -572,6 +572,10 @@ static int dwc3_phy_setup(struct dwc3 *dwc) 
	if (dwc->dis_del_phy_power_chg_quirk)

		reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE;



	if (dwc->ssp_u3_u0_quirk)

		reg |= (DWC3_GUSB3PIPECTL_UX_EXIT_PX |

				DWC3_GUSB3PIPECTL_P3EXSIGP2);



	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);



	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
@@ -1131,6 +1135,8 @@ static void dwc3_get_properties(struct dwc3 *dwc) 


	dwc->tx_de_emphasis_quirk = device_property_read_bool(dev,

				"snps,tx_de_emphasis_quirk");

	dwc->ssp_u3_u0_quirk = device_property_read_bool(dev,

				"snps,ssp-u3-u0-quirk");

	device_property_read_u8(dev, "snps,tx_de_emphasis",

				&tx_de_emphasis);

	device_property_read_string(dev, "snps,hsphy_interface",

drivers/usb/dwc3/core.h

+2 −0
Original line number Diff line number Diff line
@@ -289,6 +289,7 @@ 
#define DWC3_GUSB3PIPECTL_DEP1P2P3_EN	DWC3_GUSB3PIPECTL_DEP1P2P3(1)

#define DWC3_GUSB3PIPECTL_DEPOCHANGE	BIT(18)

#define DWC3_GUSB3PIPECTL_SUSPHY	BIT(17)

#define DWC3_GUSB3PIPECTL_P3EXSIGP2	BIT(10)

#define DWC3_GUSB3PIPECTL_LFPSFILT	BIT(9)

#define DWC3_GUSB3PIPECTL_RX_DETOPOLL	BIT(8)

#define DWC3_GUSB3PIPECTL_TX_DEEPH_MASK	DWC3_GUSB3PIPECTL_TX_DEEPH(3)
@@ -1258,6 +1259,7 @@ struct dwc3 { 
	unsigned		dis_tx_ipgap_linecheck_quirk:1;



	unsigned		tx_de_emphasis_quirk:1;

	unsigned		ssp_u3_u0_quirk:1;

	unsigned		tx_de_emphasis:2;

	unsigned		err_evt_seen:1;

	unsigned		disable_clk_gating:1;