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Commit 50183434 authored by Marek Olšák's avatar Marek Olšák Committed by Dave Airlie
Browse files

drm/radeon/kms: fix tracking of BLENDCNTL, COLOR_CHANNEL_MASK, and GB_Z on r300 



Also move ZB_DEPTHCLEARVALUE to the list of safe regs.

Signed-off-by: default avatarMarek Olšák <maraeo@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 27dcfc10

drivers/gpu/drm/radeon/r300.c

+1 −2
Original line number Diff line number Diff line
@@ -873,6 +873,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, 
		track->zb_dirty = true;

		break;

	case 0x4104:

		/* TX_ENABLE */

		for (i = 0; i < 16; i++) {

			bool enabled;
@@ -1103,8 +1104,6 @@ static int r300_packet0_check(struct radeon_cs_parser *p, 
		track->blend_read_enable = !!(idx_value & (1 << 2));

		track->cb_dirty = true;

		break;

	case 0x4f28: /* ZB_DEPTHCLEARVALUE */

		break;

	case 0x4f30: /* ZB_MASK_OFFSET */

	case 0x4f34: /* ZB_ZMASK_PITCH */

	case 0x4f44: /* ZB_HIZ_OFFSET */

drivers/gpu/drm/radeon/reg_srcs/r300

+1 −2
Original line number Diff line number Diff line
@@ -683,9 +683,7 @@ r300 0x4f60 
0x4DF4 US_ALU_CONST_G_31

0x4DF8 US_ALU_CONST_B_31

0x4DFC US_ALU_CONST_A_31

0x4E04 RB3D_BLENDCNTL_R3

0x4E08 RB3D_ABLENDCNTL_R3

0x4E0C RB3D_COLOR_CHANNEL_MASK

0x4E10 RB3D_CONSTANT_COLOR

0x4E14 RB3D_COLOR_CLEAR_VALUE

0x4E18 RB3D_ROPCNTL_R3
@@ -715,4 +713,5 @@ r300 0x4f60 
0x4F08 ZB_STENCILREFMASK

0x4F14 ZB_ZTOP

0x4F18 ZB_ZCACHE_CTLSTAT

0x4F28 ZB_DEPTHCLEARVALUE

0x4F58 ZB_ZPASS_DATA

drivers/gpu/drm/radeon/reg_srcs/r420

+1 −3
Original line number Diff line number Diff line
@@ -130,7 +130,6 @@ r420 0x4f60 
0x401C GB_SELECT

0x4020 GB_AA_CONFIG

0x4024 GB_FIFO_SIZE

0x4028 GB_Z_PEQ_CONFIG

0x4100 TX_INVALTAGS

0x4200 GA_POINT_S0

0x4204 GA_POINT_T0
@@ -750,9 +749,7 @@ r420 0x4f60 
0x4DF4 US_ALU_CONST_G_31

0x4DF8 US_ALU_CONST_B_31

0x4DFC US_ALU_CONST_A_31

0x4E04 RB3D_BLENDCNTL_R3

0x4E08 RB3D_ABLENDCNTL_R3

0x4E0C RB3D_COLOR_CHANNEL_MASK

0x4E10 RB3D_CONSTANT_COLOR

0x4E14 RB3D_COLOR_CLEAR_VALUE

0x4E18 RB3D_ROPCNTL_R3
@@ -782,4 +779,5 @@ r420 0x4f60 
0x4F08 ZB_STENCILREFMASK

0x4F14 ZB_ZTOP

0x4F18 ZB_ZCACHE_CTLSTAT

0x4F28 ZB_DEPTHCLEARVALUE

0x4F58 ZB_ZPASS_DATA

drivers/gpu/drm/radeon/reg_srcs/rs600

+1 −2
Original line number Diff line number Diff line
@@ -749,9 +749,7 @@ rs600 0x6d40 
0x4DF4 US_ALU_CONST_G_31

0x4DF8 US_ALU_CONST_B_31

0x4DFC US_ALU_CONST_A_31

0x4E04 RB3D_BLENDCNTL_R3

0x4E08 RB3D_ABLENDCNTL_R3

0x4E0C RB3D_COLOR_CHANNEL_MASK

0x4E10 RB3D_CONSTANT_COLOR

0x4E14 RB3D_COLOR_CLEAR_VALUE

0x4E18 RB3D_ROPCNTL_R3
@@ -781,4 +779,5 @@ rs600 0x6d40 
0x4F08 ZB_STENCILREFMASK

0x4F14 ZB_ZTOP

0x4F18 ZB_ZCACHE_CTLSTAT

0x4F28 ZB_DEPTHCLEARVALUE

0x4F58 ZB_ZPASS_DATA

drivers/gpu/drm/radeon/reg_srcs/rv515

+1 −3
Original line number Diff line number Diff line
@@ -164,7 +164,6 @@ rv515 0x6d40 
0x401C GB_SELECT

0x4020 GB_AA_CONFIG

0x4024 GB_FIFO_SIZE

0x4028 GB_Z_PEQ_CONFIG

0x4100 TX_INVALTAGS

0x4114 SU_TEX_WRAP_PS3

0x4118 PS3_ENABLE
@@ -461,9 +460,7 @@ rv515 0x6d40 
0x4DF4 US_ALU_CONST_G_31

0x4DF8 US_ALU_CONST_B_31

0x4DFC US_ALU_CONST_A_31

0x4E04 RB3D_BLENDCNTL_R3

0x4E08 RB3D_ABLENDCNTL_R3

0x4E0C RB3D_COLOR_CHANNEL_MASK

0x4E10 RB3D_CONSTANT_COLOR

0x4E14 RB3D_COLOR_CLEAR_VALUE

0x4E18 RB3D_ROPCNTL_R3
@@ -496,4 +493,5 @@ rv515 0x6d40 
0x4F14 ZB_ZTOP

0x4F18 ZB_ZCACHE_CTLSTAT

0x4F58 ZB_ZPASS_DATA

0x4F28 ZB_DEPTHCLEARVALUE

0x4FD4 ZB_STENCILREFMASK_BF