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Commit 5008efc8 authored by Ard Biesheuvel's avatar Ard Biesheuvel Committed by Russell King
Browse files

ARM: 8452/3: PJ4: make coprocessor access sequences buildable in Thumb2 mode 



The PJ4 inline asm sequence to write to cp15 cannot be built in Thumb-2
mode, due to the way it performs arithmetic on the program counter, so it
is built in ARM mode instead. However, building C files in ARM mode under
CONFIG_THUMB2_KERNEL is problematic, since the instrumentation performed
by subsystems like ftrace does not expect having to deal with interworking
branches.

Since the sequence in question is simply a poor man's ISB instruction,
let's use a straight 'isb' instead when building in Thumb2 mode. Thumb2
implies V7, so 'isb' should always be supported in that case.

Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Acked-by: default avatarNicolas Pitre <nico@linaro.org>
Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 36f46d6d

arch/arm/kernel/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -73,7 +73,6 @@ obj-$(CONFIG_IWMMXT) += iwmmxt.o 
obj-$(CONFIG_PERF_EVENTS)	+= perf_regs.o perf_callchain.o

obj-$(CONFIG_HW_PERF_EVENTS)	+= perf_event_xscale.o perf_event_v6.o \

				   perf_event_v7.o

CFLAGS_pj4-cp0.o		:= -marm

AFLAGS_iwmmxt.o			:= -Wa,-mcpu=iwmmxt

obj-$(CONFIG_ARM_CPU_TOPOLOGY)  += topology.o

obj-$(CONFIG_VDSO)		+= vdso.o

arch/arm/kernel/pj4-cp0.c

+4 −0
Original line number Diff line number Diff line
@@ -66,9 +66,13 @@ static void __init pj4_cp_access_write(u32 value) 


	__asm__ __volatile__ (

		"mcr	p15, 0, %1, c1, c0, 2\n\t"

#ifdef CONFIG_THUMB2_KERNEL

		"isb\n\t"

#else

		"mrc	p15, 0, %0, c1, c0, 2\n\t"

		"mov	%0, %0\n\t"

		"sub	pc, pc, #4\n\t"

#endif

		: "=r" (temp) : "r" (value));

}