Commit 4f79ddec authored Dec 20, 2016 by John Crispin Committed by Ralf Baechle Jan 03, 2017

MIPS: ralink: MT7621 does not set its SoC type.



The code does not set the SoC type properly. This went unnoticed until now
as the SoC does not share any of the driver code with the other SoCs, until
we made the mmc driver work.

Signed-off-by: John Crispin <john@phrozen.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/14896/


Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent ef462f3b

arch/mips/ralink/mt7621.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -181,7 +181,7 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
		} else {
		panic("mt7621: unknown SoC, n0:%08x n1:%08x\n", n0, n1);
		}

		ralink_soc = MT762X_SOC_MT7621AT;
		rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);

		snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN,