Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4f044a88 authored by Michal Wajdeczko's avatar Michal Wajdeczko Committed by Jani Nikula
Browse files

drm/i915: Rename global i915 to i915_modparams 



Our global struct with params is named exactly the same way
as new preferred name for the drm_i915_private function parameter.
To avoid such name reuse lets use different name for the global.

v5: pure rename
v6: fix

Credits-to: Coccinelle

@@
identifier n;
@@
(
-	i915.n
+	i915_modparams.n
)

Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Ville Syrjala <ville.syrjala@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Acked-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170919193846.38060-1-michal.wajdeczko@intel.com
parent a3df2c85

drivers/gpu/drm/i915/gvt/render.c

+1 −1
Original line number Diff line number Diff line
@@ -293,7 +293,7 @@ static void switch_mmio_to_vgpu(struct intel_vgpu *vgpu, int ring_id) 
		 */

		if (mmio->in_context &&

				((ctx_ctrl & inhibit_mask) != inhibit_mask) &&

				i915.enable_execlists)

				i915_modparams.enable_execlists)

			continue;



		if (mmio->mask)

drivers/gpu/drm/i915/i915_debugfs.c

+7 −7
Original line number Diff line number Diff line
@@ -66,7 +66,7 @@ static int i915_capabilities(struct seq_file *m, void *data) 
#undef PRINT_FLAG



	kernel_param_lock(THIS_MODULE);

#define PRINT_PARAM(T, x) seq_print_param(m, #x, #T, &i915.x);

#define PRINT_PARAM(T, x) seq_print_param(m, #x, #T, &i915_modparams.x);

	I915_PARAMS_FOR_EACH(PRINT_PARAM);

#undef PRINT_PARAM

	kernel_param_unlock(THIS_MODULE);
@@ -1266,7 +1266,7 @@ static int i915_hangcheck_info(struct seq_file *m, void *unused) 
	if (waitqueue_active(&dev_priv->gpu_error.reset_queue))

		seq_puts(m, "struct_mutex blocked for reset\n");



	if (!i915.enable_hangcheck) {

	if (!i915_modparams.enable_hangcheck) {

		seq_puts(m, "Hangcheck disabled\n");

		return 0;

	}
@@ -1701,7 +1701,7 @@ static int i915_ips_status(struct seq_file *m, void *unused) 
	intel_runtime_pm_get(dev_priv);



	seq_printf(m, "Enabled by kernel parameter: %s\n",

		   yesno(i915.enable_ips));

		   yesno(i915_modparams.enable_ips));



	if (INTEL_GEN(dev_priv) >= 8) {

		seq_puts(m, "Currently: unknown\n");
@@ -2016,7 +2016,7 @@ static int i915_dump_lrc(struct seq_file *m, void *unused) 
	enum intel_engine_id id;

	int ret;



	if (!i915.enable_execlists) {

	if (!i915_modparams.enable_execlists) {

		seq_printf(m, "Logical Ring Contexts are disabled\n");

		return 0;

	}
@@ -2592,7 +2592,7 @@ static int i915_guc_log_control_get(void *data, u64 *val) 
	if (!dev_priv->guc.log.vma)

		return -EINVAL;



	*val = i915.guc_log_level;

	*val = i915_modparams.guc_log_level;



	return 0;

}
@@ -3310,7 +3310,7 @@ static int i915_engine_info(struct seq_file *m, void *unused) 
		seq_printf(m, "\tBBADDR: 0x%08x_%08x\n",

			   upper_32_bits(addr), lower_32_bits(addr));



		if (i915.enable_execlists) {

		if (i915_modparams.enable_execlists) {

			const u32 *hws = &engine->status_page.page_addr[I915_HWS_CSB_BUF0_INDEX];

			u32 ptr, read, write;

			unsigned int idx;
@@ -3406,7 +3406,7 @@ static int i915_semaphore_status(struct seq_file *m, void *unused) 
	enum intel_engine_id id;

	int j, ret;



	if (!i915.semaphores) {

	if (!i915_modparams.semaphores) {

		seq_puts(m, "Semaphores are disabled\n");

		return 0;

	}

drivers/gpu/drm/i915/i915_drv.c

+19 −15
Original line number Diff line number Diff line
@@ -58,12 +58,12 @@ static unsigned int i915_load_fail_count; 


bool __i915_inject_load_failure(const char *func, int line)

{

	if (i915_load_fail_count >= i915.inject_load_failure)

	if (i915_load_fail_count >= i915_modparams.inject_load_failure)

		return false;



	if (++i915_load_fail_count == i915.inject_load_failure) {

	if (++i915_load_fail_count == i915_modparams.inject_load_failure) {

		DRM_INFO("Injecting failure at checkpoint %u [%s:%d]\n",

			 i915.inject_load_failure, func, line);

			 i915_modparams.inject_load_failure, func, line);

		return true;

	}
@@ -106,8 +106,8 @@ __i915_printk(struct drm_i915_private *dev_priv, const char *level, 


static bool i915_error_injected(struct drm_i915_private *dev_priv)

{

	return i915.inject_load_failure &&

	       i915_load_fail_count == i915.inject_load_failure;

	return i915_modparams.inject_load_failure &&

	       i915_load_fail_count == i915_modparams.inject_load_failure;

}



#define i915_load_error(dev_priv, fmt, ...)				     \
@@ -321,7 +321,7 @@ static int i915_getparam(struct drm_device *dev, void *data, 
		value = USES_PPGTT(dev_priv);

		break;

	case I915_PARAM_HAS_SEMAPHORES:

		value = i915.semaphores;

		value = i915_modparams.semaphores;

		break;

	case I915_PARAM_HAS_SECURE_BATCHES:

		value = capable(CAP_SYS_ADMIN);
@@ -340,7 +340,8 @@ static int i915_getparam(struct drm_device *dev, void *data, 
			return -ENODEV;

		break;

	case I915_PARAM_HAS_GPU_RESET:

		value = i915.enable_hangcheck && intel_has_gpu_reset(dev_priv);

		value = i915_modparams.enable_hangcheck &&

			intel_has_gpu_reset(dev_priv);

		if (value && intel_has_reset_engine(dev_priv))

			value = 2;

		break;
@@ -1031,9 +1032,9 @@ static void i915_driver_cleanup_mmio(struct drm_i915_private *dev_priv) 


static void intel_sanitize_options(struct drm_i915_private *dev_priv)

{

	i915.enable_execlists =

	i915_modparams.enable_execlists =

		intel_sanitize_enable_execlists(dev_priv,

						i915.enable_execlists);

						i915_modparams.enable_execlists);



	/*

	 * i915.enable_ppgtt is read-only, so do an early pass to validate the
@@ -1041,12 +1042,15 @@ static void intel_sanitize_options(struct drm_i915_private *dev_priv) 
	 * do this now so that we can print out any log messages once rather

	 * than every time we check intel_enable_ppgtt().

	 */

	i915.enable_ppgtt =

		intel_sanitize_enable_ppgtt(dev_priv, i915.enable_ppgtt);

	DRM_DEBUG_DRIVER("ppgtt mode: %i\n", i915.enable_ppgtt);

	i915_modparams.enable_ppgtt =

		intel_sanitize_enable_ppgtt(dev_priv,

					    i915_modparams.enable_ppgtt);

	DRM_DEBUG_DRIVER("ppgtt mode: %i\n", i915_modparams.enable_ppgtt);



	i915.semaphores = intel_sanitize_semaphores(dev_priv, i915.semaphores);

	DRM_DEBUG_DRIVER("use GPU semaphores? %s\n", yesno(i915.semaphores));

	i915_modparams.semaphores =

		intel_sanitize_semaphores(dev_priv, i915_modparams.semaphores);

	DRM_DEBUG_DRIVER("use GPU semaphores? %s\n",

			 yesno(i915_modparams.semaphores));



	intel_uc_sanitize_options(dev_priv);
@@ -1277,7 +1281,7 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent) 
	int ret;



	/* Enable nuclear pageflip on ILK+ */

	if (!i915.nuclear_pageflip && match_info->gen < 5)

	if (!i915_modparams.nuclear_pageflip && match_info->gen < 5)

		driver.driver_features &= ~DRIVER_ATOMIC;



	ret = -ENOMEM;

drivers/gpu/drm/i915/i915_drv.h

+5 −5
Original line number Diff line number Diff line
@@ -93,7 +93,7 @@ 
#define I915_STATE_WARN(condition, format...) ({			\

	int __ret_warn_on = !!(condition);				\

	if (unlikely(__ret_warn_on))					\

		if (!WARN(i915.verbose_state_checks, format))		\

		if (!WARN(i915_modparams.verbose_state_checks, format))	\

			DRM_ERROR(format);				\

	unlikely(__ret_warn_on);					\

})
@@ -3076,9 +3076,9 @@ intel_info(const struct drm_i915_private *dev_priv) 


#define HAS_LOGICAL_RING_CONTEXTS(dev_priv) \

		((dev_priv)->info.has_logical_ring_contexts)

#define USES_PPGTT(dev_priv)		(i915.enable_ppgtt)

#define USES_FULL_PPGTT(dev_priv)	(i915.enable_ppgtt >= 2)

#define USES_FULL_48BIT_PPGTT(dev_priv)	(i915.enable_ppgtt == 3)

#define USES_PPGTT(dev_priv)		(i915_modparams.enable_ppgtt)

#define USES_FULL_PPGTT(dev_priv)	(i915_modparams.enable_ppgtt >= 2)

#define USES_FULL_48BIT_PPGTT(dev_priv)	(i915_modparams.enable_ppgtt == 3)



#define HAS_OVERLAY(dev_priv)		 ((dev_priv)->info.has_overlay)

#define OVERLAY_NEEDS_PHYSICAL(dev_priv) \
@@ -3279,7 +3279,7 @@ static inline void i915_queue_hangcheck(struct drm_i915_private *dev_priv) 
{

	unsigned long delay;



	if (unlikely(!i915.enable_hangcheck))

	if (unlikely(!i915_modparams.enable_hangcheck))

		return;



	/* Don't continually defer the hangcheck so that it is always run at

drivers/gpu/drm/i915/i915_gem.c

+2 −2
Original line number Diff line number Diff line
@@ -4738,7 +4738,7 @@ bool intel_sanitize_semaphores(struct drm_i915_private *dev_priv, int value) 
		return false;



	/* TODO: make semaphores and Execlists play nicely together */

	if (i915.enable_execlists)

	if (i915_modparams.enable_execlists)

		return false;



	if (value >= 0)
@@ -4759,7 +4759,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv) 


	dev_priv->mm.unordered_timeline = dma_fence_context_alloc(1);



	if (!i915.enable_execlists) {

	if (!i915_modparams.enable_execlists) {

		dev_priv->gt.resume = intel_legacy_submission_resume;

		dev_priv->gt.cleanup_engine = intel_engine_cleanup;

	} else {