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Commit 4ed11d79 authored by Frank Min's avatar Frank Min Committed by Alex Deucher
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drm/amdgpu: According hardware design revert vce and uvd doorbell assignment



Now uvd doorbell is from 0xf8-0xfb and vce doorbell is from 0xfc-0xff

Signed-off-by: default avatarFrank Min <Frank.Min@amd.com>
Signed-off-by: default avatarXiangliang.Yu <Xiangliang.Yu@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a1b9022a
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+9 −9
Original line number Diff line number Diff line
@@ -678,15 +678,15 @@ typedef enum _AMDGPU_DOORBELL64_ASSIGNMENT
	/* overlap the doorbell assignment with VCN as they are  mutually exclusive
	 * VCE engine's doorbell is 32 bit and two VCE ring share one QWORD
	 */
	AMDGPU_DOORBELL64_RING0_1                 = 0xF8,
	AMDGPU_DOORBELL64_RING2_3                 = 0xF9,
	AMDGPU_DOORBELL64_RING4_5                 = 0xFA,
	AMDGPU_DOORBELL64_RING6_7                 = 0xFB,

	AMDGPU_DOORBELL64_UVD_RING0_1             = 0xFC,
	AMDGPU_DOORBELL64_UVD_RING2_3             = 0xFD,
	AMDGPU_DOORBELL64_UVD_RING4_5             = 0xFE,
	AMDGPU_DOORBELL64_UVD_RING6_7             = 0xFF,
	AMDGPU_DOORBELL64_UVD_RING0_1             = 0xF8,
	AMDGPU_DOORBELL64_UVD_RING2_3             = 0xF9,
	AMDGPU_DOORBELL64_UVD_RING4_5             = 0xFA,
	AMDGPU_DOORBELL64_UVD_RING6_7             = 0xFB,

	AMDGPU_DOORBELL64_VCE_RING0_1             = 0xFC,
	AMDGPU_DOORBELL64_VCE_RING2_3             = 0xFD,
	AMDGPU_DOORBELL64_VCE_RING4_5             = 0xFE,
	AMDGPU_DOORBELL64_VCE_RING6_7             = 0xFF,

	AMDGPU_DOORBELL64_MAX_ASSIGNMENT          = 0xFF,
	AMDGPU_DOORBELL64_INVALID                 = 0xFFFF
+8 −2
Original line number Diff line number Diff line
@@ -435,13 +435,19 @@ static int uvd_v7_0_sw_init(void *handle)
			return r;
	}


	for (i = 0; i < adev->uvd.num_enc_rings; ++i) {
		ring = &adev->uvd.ring_enc[i];
		sprintf(ring->name, "uvd_enc%d", i);
		if (amdgpu_sriov_vf(adev)) {
			ring->use_doorbell = true;

			/* currently only use the first enconding ring for
			 * sriov, so set unused location for other unused rings.
			 */
			if (i == 0)
				ring->doorbell_index = AMDGPU_DOORBELL64_UVD_RING0_1 * 2;
			else
				ring->doorbell_index = AMDGPU_DOORBELL64_UVD_RING2_3 * 2 + 1;
		}
		r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.irq, 0);
		if (r)
+6 −4
Original line number Diff line number Diff line
@@ -445,12 +445,14 @@ static int vce_v4_0_sw_init(void *handle)
		if (amdgpu_sriov_vf(adev)) {
			/* DOORBELL only works under SRIOV */
			ring->use_doorbell = true;

			/* currently only use the first encoding ring for sriov,
			 * so set unused location for other unused rings.
			 */
			if (i == 0)
				ring->doorbell_index = AMDGPU_DOORBELL64_RING0_1 * 2;
			else if (i == 1)
				ring->doorbell_index = AMDGPU_DOORBELL64_RING2_3 * 2;
				ring->doorbell_index = AMDGPU_DOORBELL64_VCE_RING0_1 * 2;
			else
				ring->doorbell_index = AMDGPU_DOORBELL64_RING2_3 * 2 + 1;
				ring->doorbell_index = AMDGPU_DOORBELL64_VCE_RING2_3 * 2 + 1;
		}
		r = amdgpu_ring_init(adev, ring, 512, &adev->vce.irq, 0);
		if (r)