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Commit 4ece93c0 authored by Kishon Vijay Abraham I's avatar Kishon Vijay Abraham I Committed by Tony Lindgren
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ARM: dts: dra7: Add properties to enable PCIe x2 lane mode



ti,syscon-lane-sel and ti,syscon-lane-conf properties specific to enable
PCIe x2 lane mode are added here.

Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: default avatarSekhar Nori <nsekhar@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 704f423c
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+4 −0
Original line number Original line Diff line number Diff line
@@ -309,6 +309,8 @@
				ti,hwmods = "pcie1";
				ti,hwmods = "pcie1";
				phys = <&pcie1_phy>;
				phys = <&pcie1_phy>;
				phy-names = "pcie-phy0";
				phy-names = "pcie-phy0";
				ti,syscon-lane-conf = <&scm_conf 0x558>;
				ti,syscon-lane-sel = <&scm_conf_pcie 0x18>;
				interrupt-map-mask = <0 0 0 7>;
				interrupt-map-mask = <0 0 0 7>;
				interrupt-map = <0 0 0 1 &pcie1_intc 1>,
				interrupt-map = <0 0 0 1 &pcie1_intc 1>,
						<0 0 0 2 &pcie1_intc 2>,
						<0 0 0 2 &pcie1_intc 2>,
@@ -334,6 +336,8 @@
				phys = <&pcie1_phy>;
				phys = <&pcie1_phy>;
				phy-names = "pcie-phy0";
				phy-names = "pcie-phy0";
				ti,syscon-unaligned-access = <&scm_conf1 0x14 2>;
				ti,syscon-unaligned-access = <&scm_conf1 0x14 2>;
				ti,syscon-lane-conf = <&scm_conf 0x558>;
				ti,syscon-lane-sel = <&scm_conf_pcie 0x18>;
				status = "disabled";
				status = "disabled";
			};
			};
		};
		};