Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4e85e777 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Mark Brown
Browse files

ASoC: omap-mcbsp: Enable TX/RX under and overflow interrupts



FIFO under or overflow can cause channel swaps and data loss. Reporting
them can help to identify such events.

Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 29b4817d
Loading
Loading
Loading
Loading
+2 −1
Original line number Diff line number Diff line
@@ -221,7 +221,8 @@ void omap_mcbsp_config(struct omap_mcbsp *mcbsp,

	/* Enable TX/RX sync error interrupts by default */
	if (mcbsp->irq)
		MCBSP_WRITE(mcbsp, IRQEN, RSYNCERREN | XSYNCERREN);
		MCBSP_WRITE(mcbsp, IRQEN, RSYNCERREN | XSYNCERREN |
			    RUNDFLEN | ROVFLEN | XUNDFLEN | XOVFLEN);
}

/**