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Commit 4e81d58f authored by Chetan C R's avatar Chetan C R Committed by Gerrit - the friendly Code Review server
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clk: qcom: gcc: Add GPLL6 fixed factor support for qm215 



Due to some race between gpll6_out_main and out_aux
clocks pll enable bit was getting cleared. This makes
gpll6_out_main as fixed factor clock so, that enable_bit
is set and reset only from out_aux clock for qm215 target.

Change-Id: I2a26581af648a36babb149972c1d81f85310a720
Signed-off-by: default avatarChetan C R <cchinnad@codeaurora.org>
parent fc6f1421

drivers/clk/qcom/gcc-sdm429w.c

+9 −9
Original line number Diff line number Diff line
@@ -514,25 +514,25 @@ static struct clk_pll gpll6 = { 
	},

};



static struct clk_regmap gpll6_out_main = {

static struct clk_regmap gpll6_out_aux = {

	.enable_reg = 0x45000,

	.enable_mask = BIT(7),

	.hw.init = &(struct clk_init_data){

		.name = "gpll6_out_main",

		.name = "gpll6_out_aux",

		.parent_names = (const char *[]){ "gpll6" },

		.num_parents = 1,

		.ops = &clk_pll_vote_ops,

	},

};



static struct clk_regmap gpll6_out_aux = {

	.enable_reg = 0x45000,

	.enable_mask = BIT(7),

static struct clk_fixed_factor gpll6_out_main = {

	.mult = 1,

	.div = 1,

	.hw.init = &(struct clk_init_data){

		.name = "gpll6_out_aux",

		.parent_names = (const char *[]){ "gpll6" },

		.name = "gpll6_out_main",

		.parent_names = (const char *[]){ "gpll6_out_aux" },

		.num_parents = 1,

		.ops = &clk_pll_vote_ops,

		.ops = &clk_fixed_factor_ops,

	},

};
@@ -3940,6 +3940,7 @@ static struct clk_dummy wcnss_m_clk = { 


struct clk_hw *gcc_sdm429w_hws[] = {

	[GPLL0_OUT_AUX] = &gpll0_out_aux.hw,

	[GPLL6_OUT_MAIN] = &gpll6_out_main.hw,

};



static struct clk_regmap *gcc_sdm429w_clocks[] = {
@@ -4020,7 +4021,6 @@ static struct clk_regmap *gcc_sdm429w_clocks[] = { 
	[GPLL0_SLEEP_CLK_SRC] = &gpll0_sleep_clk_src.clkr,

	[GPLL3_OUT_MAIN] = &gpll3_out_main.clkr,

	[GPLL4_OUT_MAIN] = &gpll4_out_main.clkr,

	[GPLL6_OUT_MAIN] = &gpll6_out_main,

	[GPLL6] = &gpll6.clkr,

	[GPLL6_OUT_AUX] = &gpll6_out_aux,

	[JPEG0_CLK_SRC] = &jpeg0_clk_src.clkr,