Loading drivers/soc/qcom/dcc.c +26 −7 Original line number Diff line number Diff line Loading @@ -33,8 +33,6 @@ #define dcc_readl(drvdata, off) \ __raw_readl(drvdata->base + off) #define dcc_sram_writel(drvdata, val, off) \ __raw_writel((val), drvdata->ram_base + off) #define dcc_sram_readl(drvdata, off) \ __raw_readl(drvdata->ram_base + off) Loading Loading @@ -123,6 +121,16 @@ struct dcc_drvdata { uint64_t xpu_addr; uint32_t xpu_unlock_count; }; static int dcc_sram_writel(struct dcc_drvdata *drvdata, uint32_t val, uint32_t off) { if (unlikely(off > (drvdata->ram_size - 4))) return -EINVAL; __raw_writel((val), drvdata->ram_base + off); return 0; } static int dcc_cfg_xpu(struct dcc_drvdata *drvdata, bool enable) { Loading Loading @@ -271,12 +279,17 @@ static int __dcc_ll_cfg(struct dcc_drvdata *drvdata) if (!prev_addr || prev_addr != addr || prev_off > off) { /* Check if we need to write link of prev entry */ if (link) { dcc_sram_writel(drvdata, link, sram_offset); ret = dcc_sram_writel(drvdata, link, sram_offset); if (ret) goto overstep; sram_offset += 4; } /* Write address */ dcc_sram_writel(drvdata, addr, sram_offset); ret = dcc_sram_writel(drvdata, addr, sram_offset); if (ret) goto overstep; sram_offset += 4; /* Reset link and prev_off */ Loading Loading @@ -316,7 +329,9 @@ static int __dcc_ll_cfg(struct dcc_drvdata *drvdata) ((entry->len << 8) & BM(8, 14))) << pos; if (pos) { dcc_sram_writel(drvdata, link, sram_offset); ret = dcc_sram_writel(drvdata, link, sram_offset); if (ret) goto overstep; sram_offset += 4; link = 0; } Loading @@ -326,12 +341,16 @@ static int __dcc_ll_cfg(struct dcc_drvdata *drvdata) } if (link) { dcc_sram_writel(drvdata, link, sram_offset); ret = dcc_sram_writel(drvdata, link, sram_offset); if (ret) goto overstep; sram_offset += 4; } /* Setting zero to indicate end of the list */ dcc_sram_writel(drvdata, 0, sram_offset); ret = dcc_sram_writel(drvdata, 0, sram_offset); if (ret) goto overstep; sram_offset += 4; /* check if the data will overstep */ Loading Loading
drivers/soc/qcom/dcc.c +26 −7 Original line number Diff line number Diff line Loading @@ -33,8 +33,6 @@ #define dcc_readl(drvdata, off) \ __raw_readl(drvdata->base + off) #define dcc_sram_writel(drvdata, val, off) \ __raw_writel((val), drvdata->ram_base + off) #define dcc_sram_readl(drvdata, off) \ __raw_readl(drvdata->ram_base + off) Loading Loading @@ -123,6 +121,16 @@ struct dcc_drvdata { uint64_t xpu_addr; uint32_t xpu_unlock_count; }; static int dcc_sram_writel(struct dcc_drvdata *drvdata, uint32_t val, uint32_t off) { if (unlikely(off > (drvdata->ram_size - 4))) return -EINVAL; __raw_writel((val), drvdata->ram_base + off); return 0; } static int dcc_cfg_xpu(struct dcc_drvdata *drvdata, bool enable) { Loading Loading @@ -271,12 +279,17 @@ static int __dcc_ll_cfg(struct dcc_drvdata *drvdata) if (!prev_addr || prev_addr != addr || prev_off > off) { /* Check if we need to write link of prev entry */ if (link) { dcc_sram_writel(drvdata, link, sram_offset); ret = dcc_sram_writel(drvdata, link, sram_offset); if (ret) goto overstep; sram_offset += 4; } /* Write address */ dcc_sram_writel(drvdata, addr, sram_offset); ret = dcc_sram_writel(drvdata, addr, sram_offset); if (ret) goto overstep; sram_offset += 4; /* Reset link and prev_off */ Loading Loading @@ -316,7 +329,9 @@ static int __dcc_ll_cfg(struct dcc_drvdata *drvdata) ((entry->len << 8) & BM(8, 14))) << pos; if (pos) { dcc_sram_writel(drvdata, link, sram_offset); ret = dcc_sram_writel(drvdata, link, sram_offset); if (ret) goto overstep; sram_offset += 4; link = 0; } Loading @@ -326,12 +341,16 @@ static int __dcc_ll_cfg(struct dcc_drvdata *drvdata) } if (link) { dcc_sram_writel(drvdata, link, sram_offset); ret = dcc_sram_writel(drvdata, link, sram_offset); if (ret) goto overstep; sram_offset += 4; } /* Setting zero to indicate end of the list */ dcc_sram_writel(drvdata, 0, sram_offset); ret = dcc_sram_writel(drvdata, 0, sram_offset); if (ret) goto overstep; sram_offset += 4; /* check if the data will overstep */ Loading