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Commit 4e0bbc31 authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
Browse files

drm/i915/bdw: display stuff 



Just enough to make the code not barf...

Init BDW display to look like HSW. For the simulator this should be
fine, but this will probably require more work.

Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
[danvet: Add a FIXME comment about RCS flips being untested on bdw.
Also add a note that hblank events are reserved on bdw+ in DERRMR.]
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 1020a5c2

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -743,6 +743,7 @@ 
#define   FPGA_DBG_RM_NOCLAIM	(1<<31)

#define   FPGA_DBG_RM_NOCLAIM	(1<<31)





#define DERRMR		0x44050

#define DERRMR		0x44050

/* Note that HBLANK events are reserved on bdw+ */

#define   DERRMR_PIPEA_SCANLINE		(1<<0)

#define   DERRMR_PIPEA_SCANLINE		(1<<0)

#define   DERRMR_PIPEA_PRI_FLIP_DONE	(1<<1)

#define   DERRMR_PIPEA_PRI_FLIP_DONE	(1<<1)

#define   DERRMR_PIPEA_SPR_FLIP_DONE	(1<<2)

#define   DERRMR_PIPEA_SPR_FLIP_DONE	(1<<2)

drivers/gpu/drm/i915/intel_display.c

+2 −1
Original line number Original line Diff line number Diff line
@@ -10309,7 +10309,7 @@ static void intel_init_display(struct drm_device *dev) 
			dev_priv->display.write_eld = ironlake_write_eld;

			dev_priv->display.write_eld = ironlake_write_eld;

			dev_priv->display.modeset_global_resources =

			dev_priv->display.modeset_global_resources =

				ivb_modeset_global_resources;

				ivb_modeset_global_resources;

		} else if (IS_HASWELL(dev)) {

		} else if (IS_HASWELL(dev) || IS_GEN8(dev)) {

			dev_priv->display.fdi_link_train = hsw_fdi_link_train;

			dev_priv->display.fdi_link_train = hsw_fdi_link_train;

			dev_priv->display.write_eld = haswell_write_eld;

			dev_priv->display.write_eld = haswell_write_eld;

			dev_priv->display.modeset_global_resources =

			dev_priv->display.modeset_global_resources =
@@ -10340,6 +10340,7 @@ static void intel_init_display(struct drm_device *dev) 
		dev_priv->display.queue_flip = intel_gen6_queue_flip;

		dev_priv->display.queue_flip = intel_gen6_queue_flip;

		break;

		break;

	case 7:

	case 7:

	case 8: /* FIXME(BDW): Check that the gen8 RCS flip works. */

		dev_priv->display.queue_flip = intel_gen7_queue_flip;

		dev_priv->display.queue_flip = intel_gen7_queue_flip;

		break;

		break;

	}

	}

drivers/gpu/drm/i915/intel_sprite.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -1092,6 +1092,7 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane) 
		break;

		break;





	case 7:

	case 7:

	case 8:

		if (IS_IVYBRIDGE(dev)) {

		if (IS_IVYBRIDGE(dev)) {

			intel_plane->can_scale = true;

			intel_plane->can_scale = true;

			intel_plane->max_downscale = 2;

			intel_plane->max_downscale = 2;