Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4cac949f authored by Iyappan Subramanian's avatar Iyappan Subramanian Committed by David S. Miller
Browse files

Documentation: dtb: xgene: Add channel property

parent 2a37daa6
Loading
Loading
Loading
Loading
+2 −0
Original line number Diff line number Diff line
@@ -18,6 +18,8 @@ Required properties for all the ethernet interfaces:
  - First is the Rx interrupt.  This irq is mandatory.
  - Second is the Tx completion interrupt.
    This is supported only on SGMII based 1GbE and 10GbE interfaces.
- channel: Ethernet to CPU, start channel (prefetch buffer) number
  - Must map to the first irq and irqs must be sequential
- port-id: Port number (0 or 1)
- clocks: Reference to the clock entry.
- local-mac-address: MAC address assigned to this device