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Commit 4b8240bf authored by Yue Hin Lau's avatar Yue Hin Lau Committed by Alex Deucher
Browse files

drm/amd/display: hubp refactor 



Signed-off-by: default avatarYue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4b4f8f74

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c

+10 −8
Original line number Diff line number Diff line
@@ -107,10 +107,12 @@ static void hubp1_vready_workaround(struct hubp *hubp, 
}



void hubp1_program_tiling(

	struct dcn10_hubp *hubp1,

	struct hubp *hubp,

	const union dc_tiling_info *info,

	const enum surface_pixel_format pixel_format)

{

	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);



	REG_UPDATE_6(DCSURF_ADDR_CONFIG,

			NUM_PIPES, log_2(info->gfx9.num_pipes),

			NUM_BANKS, log_2(info->gfx9.num_banks),
@@ -127,13 +129,14 @@ void hubp1_program_tiling( 
}



void hubp1_program_size_and_rotation(

	struct dcn10_hubp *hubp1,

	struct hubp *hubp,

	enum dc_rotation_angle rotation,

	enum surface_pixel_format format,

	const union plane_size *plane_size,

	struct dc_plane_dcc_param *dcc,

	bool horizontal_mirror)

{

	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);

	uint32_t pitch, meta_pitch, pitch_c, meta_pitch_c, mirror;



	/* Program data and meta surface pitch (calculation from addrlib)
@@ -189,9 +192,10 @@ void hubp1_program_size_and_rotation( 
}



void hubp1_program_pixel_format(

	struct dcn10_hubp *hubp1,

	struct hubp *hubp,

	enum surface_pixel_format format)

{

	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);

	uint32_t red_bar = 3;

	uint32_t blue_bar = 2;
@@ -435,13 +439,11 @@ void hubp1_program_surface_config( 
	struct dc_plane_dcc_param *dcc,

	bool horizontal_mirror)

{

	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);



	hubp1_dcc_control(hubp, dcc->enable, dcc->grph.independent_64b_blks);

	hubp1_program_tiling(hubp1, tiling_info, format);

	hubp1_program_tiling(hubp, tiling_info, format);

	hubp1_program_size_and_rotation(

			hubp1, rotation, format, plane_size, dcc, horizontal_mirror);

	hubp1_program_pixel_format(hubp1, format);

			hubp, rotation, format, plane_size, dcc, horizontal_mirror);

	hubp1_program_pixel_format(hubp, format);

}



void hubp1_program_requestor(

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h

+110 −106
Original line number Diff line number Diff line
@@ -127,112 +127,114 @@ 
	SRI(CURSOR_HOT_SPOT, CURSOR, id), \

	SRI(CURSOR_DST_OFFSET, CURSOR, id)



#define HUBP_COMMON_REG_VARIABLE_LIST \

	uint32_t DCHUBP_CNTL; \

	uint32_t HUBPREQ_DEBUG_DB; \

	uint32_t DCSURF_ADDR_CONFIG; \

	uint32_t DCSURF_TILING_CONFIG; \

	uint32_t DCSURF_SURFACE_PITCH; \

	uint32_t DCSURF_SURFACE_PITCH_C; \

	uint32_t DCSURF_SURFACE_CONFIG; \

	uint32_t DCSURF_FLIP_CONTROL; \

	uint32_t DCSURF_PRI_VIEWPORT_DIMENSION; \

	uint32_t DCSURF_PRI_VIEWPORT_START; \

	uint32_t DCSURF_SEC_VIEWPORT_DIMENSION; \

	uint32_t DCSURF_SEC_VIEWPORT_START; \

	uint32_t DCSURF_PRI_VIEWPORT_DIMENSION_C; \

	uint32_t DCSURF_PRI_VIEWPORT_START_C; \

	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH; \

	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS; \

	uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH; \

	uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS; \

	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH; \

	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS; \

	uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH; \

	uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS; \

	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C; \

	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_C; \

	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C; \

	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_C; \

	uint32_t DCSURF_SURFACE_INUSE; \

	uint32_t DCSURF_SURFACE_INUSE_HIGH; \

	uint32_t DCSURF_SURFACE_INUSE_C; \

	uint32_t DCSURF_SURFACE_INUSE_HIGH_C; \

	uint32_t DCSURF_SURFACE_EARLIEST_INUSE; \

	uint32_t DCSURF_SURFACE_EARLIEST_INUSE_HIGH; \

	uint32_t DCSURF_SURFACE_EARLIEST_INUSE_C; \

	uint32_t DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C; \

	uint32_t DCSURF_SURFACE_CONTROL; \

	uint32_t HUBPRET_CONTROL; \

	uint32_t DCN_EXPANSION_MODE; \

	uint32_t DCHUBP_REQ_SIZE_CONFIG; \

	uint32_t DCHUBP_REQ_SIZE_CONFIG_C; \

	uint32_t BLANK_OFFSET_0; \

	uint32_t BLANK_OFFSET_1; \

	uint32_t DST_DIMENSIONS; \

	uint32_t DST_AFTER_SCALER; \

	uint32_t PREFETCH_SETTINS; \

	uint32_t PREFETCH_SETTINGS; \

	uint32_t VBLANK_PARAMETERS_0; \

	uint32_t REF_FREQ_TO_PIX_FREQ; \

	uint32_t VBLANK_PARAMETERS_1; \

	uint32_t VBLANK_PARAMETERS_3; \

	uint32_t NOM_PARAMETERS_0; \

	uint32_t NOM_PARAMETERS_1; \

	uint32_t NOM_PARAMETERS_4; \

	uint32_t NOM_PARAMETERS_5; \

	uint32_t PER_LINE_DELIVERY_PRE; \

	uint32_t PER_LINE_DELIVERY; \

	uint32_t PREFETCH_SETTINS_C; \

	uint32_t PREFETCH_SETTINGS_C; \

	uint32_t VBLANK_PARAMETERS_2; \

	uint32_t VBLANK_PARAMETERS_4; \

	uint32_t NOM_PARAMETERS_2; \

	uint32_t NOM_PARAMETERS_3; \

	uint32_t NOM_PARAMETERS_6; \

	uint32_t NOM_PARAMETERS_7; \

	uint32_t DCN_TTU_QOS_WM; \

	uint32_t DCN_GLOBAL_TTU_CNTL; \

	uint32_t DCN_SURF0_TTU_CNTL0; \

	uint32_t DCN_SURF0_TTU_CNTL1; \

	uint32_t DCN_SURF1_TTU_CNTL0; \

	uint32_t DCN_SURF1_TTU_CNTL1; \

	uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB; \

	uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB; \

	uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB; \

	uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB; \

	uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB; \

	uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB; \

	uint32_t DCN_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB; \

	uint32_t DCN_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB; \

	uint32_t DCN_VM_MX_L1_TLB_CNTL; \

	uint32_t DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB; \

	uint32_t DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB; \

	uint32_t DCN_VM_SYSTEM_APERTURE_LOW_ADDR_MSB; \

	uint32_t DCN_VM_SYSTEM_APERTURE_LOW_ADDR_LSB; \

	uint32_t DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_MSB; \

	uint32_t DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_LSB; \

	uint32_t DCN_VM_SYSTEM_APERTURE_LOW_ADDR; \

	uint32_t DCN_VM_SYSTEM_APERTURE_HIGH_ADDR; \

	uint32_t DCHUBBUB_SDPIF_FB_BASE; \

	uint32_t DCHUBBUB_SDPIF_FB_OFFSET; \

	uint32_t DCN_VM_FB_LOCATION_TOP; \

	uint32_t DCN_VM_FB_LOCATION_BASE; \

	uint32_t DCN_VM_FB_OFFSET; \

	uint32_t DCN_VM_AGP_BASE; \

	uint32_t DCN_VM_AGP_BOT; \

	uint32_t DCN_VM_AGP_TOP; \

	uint32_t CURSOR_SETTINS; \

	uint32_t CURSOR_SETTINGS; \

	uint32_t CURSOR_SURFACE_ADDRESS_HIGH; \

	uint32_t CURSOR_SURFACE_ADDRESS; \

	uint32_t CURSOR_SIZE; \

	uint32_t CURSOR_CONTROL; \

	uint32_t CURSOR_POSITION; \

	uint32_t CURSOR_HOT_SPOT; \

	uint32_t CURSOR_DST_OFFSET;





struct dcn_mi_registers {

	uint32_t DCHUBP_CNTL;

	uint32_t HUBPREQ_DEBUG_DB;

	uint32_t DCSURF_ADDR_CONFIG;

	uint32_t DCSURF_TILING_CONFIG;

	uint32_t DCSURF_SURFACE_PITCH;

	uint32_t DCSURF_SURFACE_PITCH_C;

	uint32_t DCSURF_SURFACE_CONFIG;

	uint32_t DCSURF_FLIP_CONTROL;

	uint32_t DCSURF_PRI_VIEWPORT_DIMENSION;

	uint32_t DCSURF_PRI_VIEWPORT_START;

	uint32_t DCSURF_SEC_VIEWPORT_DIMENSION;

	uint32_t DCSURF_SEC_VIEWPORT_START;

	uint32_t DCSURF_PRI_VIEWPORT_DIMENSION_C;

	uint32_t DCSURF_PRI_VIEWPORT_START_C;

	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH;

	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS;

	uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH;

	uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS;

	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH;

	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS;

	uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH;

	uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS;

	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C;

	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_C;

	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C;

	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_C;

	uint32_t DCSURF_SURFACE_INUSE;

	uint32_t DCSURF_SURFACE_INUSE_HIGH;

	uint32_t DCSURF_SURFACE_INUSE_C;

	uint32_t DCSURF_SURFACE_INUSE_HIGH_C;

	uint32_t DCSURF_SURFACE_EARLIEST_INUSE;

	uint32_t DCSURF_SURFACE_EARLIEST_INUSE_HIGH;

	uint32_t DCSURF_SURFACE_EARLIEST_INUSE_C;

	uint32_t DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C;

	uint32_t DCSURF_SURFACE_CONTROL;

	uint32_t HUBPRET_CONTROL;

	uint32_t DCN_EXPANSION_MODE;

	uint32_t DCHUBP_REQ_SIZE_CONFIG;

	uint32_t DCHUBP_REQ_SIZE_CONFIG_C;

	uint32_t BLANK_OFFSET_0;

	uint32_t BLANK_OFFSET_1;

	uint32_t DST_DIMENSIONS;

	uint32_t DST_AFTER_SCALER;

	uint32_t PREFETCH_SETTINS;

	uint32_t PREFETCH_SETTINGS;

	uint32_t VBLANK_PARAMETERS_0;

	uint32_t REF_FREQ_TO_PIX_FREQ;

	uint32_t VBLANK_PARAMETERS_1;

	uint32_t VBLANK_PARAMETERS_3;

	uint32_t NOM_PARAMETERS_0;

	uint32_t NOM_PARAMETERS_1;

	uint32_t NOM_PARAMETERS_4;

	uint32_t NOM_PARAMETERS_5;

	uint32_t PER_LINE_DELIVERY_PRE;

	uint32_t PER_LINE_DELIVERY;

	uint32_t PREFETCH_SETTINS_C;

	uint32_t PREFETCH_SETTINGS_C;

	uint32_t VBLANK_PARAMETERS_2;

	uint32_t VBLANK_PARAMETERS_4;

	uint32_t NOM_PARAMETERS_2;

	uint32_t NOM_PARAMETERS_3;

	uint32_t NOM_PARAMETERS_6;

	uint32_t NOM_PARAMETERS_7;

	uint32_t DCN_TTU_QOS_WM;

	uint32_t DCN_GLOBAL_TTU_CNTL;

	uint32_t DCN_SURF0_TTU_CNTL0;

	uint32_t DCN_SURF0_TTU_CNTL1;

	uint32_t DCN_SURF1_TTU_CNTL0;

	uint32_t DCN_SURF1_TTU_CNTL1;

	uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_MSB;

	uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LSB;

	uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_MSB;

	uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LSB;

	uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_MSB;

	uint32_t DCN_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LSB;

	uint32_t DCN_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_MSB;

	uint32_t DCN_VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR_LSB;

	uint32_t DCN_VM_MX_L1_TLB_CNTL;

	uint32_t DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB;

	uint32_t DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB;

	uint32_t DCN_VM_SYSTEM_APERTURE_LOW_ADDR_MSB;

	uint32_t DCN_VM_SYSTEM_APERTURE_LOW_ADDR_LSB;

	uint32_t DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_MSB;

	uint32_t DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_LSB;

	uint32_t DCN_VM_SYSTEM_APERTURE_LOW_ADDR;

	uint32_t DCN_VM_SYSTEM_APERTURE_HIGH_ADDR;

	uint32_t DCHUBBUB_SDPIF_FB_BASE;

	uint32_t DCHUBBUB_SDPIF_FB_OFFSET;

	uint32_t DCN_VM_FB_LOCATION_TOP;

	uint32_t DCN_VM_FB_LOCATION_BASE;

	uint32_t DCN_VM_FB_OFFSET;

	uint32_t DCN_VM_AGP_BASE;

	uint32_t DCN_VM_AGP_BOT;

	uint32_t DCN_VM_AGP_TOP;

	uint32_t CURSOR_SETTINS;

	uint32_t CURSOR_SETTINGS;

	uint32_t CURSOR_SURFACE_ADDRESS_HIGH;

	uint32_t CURSOR_SURFACE_ADDRESS;

	uint32_t CURSOR_SIZE;

	uint32_t CURSOR_CONTROL;

	uint32_t CURSOR_POSITION;

	uint32_t CURSOR_HOT_SPOT;

	uint32_t CURSOR_DST_OFFSET;

	HUBP_COMMON_REG_VARIABLE_LIST

};



#define HUBP_SF(reg_name, field_name, post_fix)\
@@ -398,6 +400,8 @@ struct dcn_mi_registers { 
	HUBP_SF(CURSOR0_CURSOR_DST_OFFSET, CURSOR_DST_X_OFFSET, mask_sh)









#define DCN_HUBP_REG_FIELD_LIST(type) \

	type HUBP_BLANK_EN;\

	type HUBP_TTU_DISABLE;\
@@ -611,11 +615,11 @@ void hubp1_program_requestor( 
		struct _vcs_dpi_display_rq_regs_st *rq_regs);



void hubp1_program_pixel_format(

	struct dcn10_hubp *hubp,

	struct hubp *hubp,

	enum surface_pixel_format format);



void hubp1_program_size_and_rotation(

	struct dcn10_hubp *hubp,

	struct hubp *hubp,

	enum dc_rotation_angle rotation,

	enum surface_pixel_format format,

	const union plane_size *plane_size,
@@ -623,7 +627,7 @@ void hubp1_program_size_and_rotation( 
	bool horizontal_mirror);



void hubp1_program_tiling(

	struct dcn10_hubp *hubp,

	struct hubp *hubp,

	const union dc_tiling_info *info,

	const enum surface_pixel_format pixel_format);