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Commit 4ac4e120 authored by Kedareswara rao Appana's avatar Kedareswara rao Appana Committed by Vinod Koul
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Documentation: DT: vdma: Add clock support for dmas



This patch updates the binding doc with clock description
for AXI DMA's.

Acked-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarSören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: default avatarKedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent fb236667
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+15 −0
Original line number Diff line number Diff line
@@ -21,6 +21,18 @@ Required properties:
- dma-channel child node: Should have at least one channel and can have up to
	two channels per device. This node specifies the properties of each
	DMA channel (see child node properties below).
- clocks: Input clock specifier. Refer to common clock bindings.
- clock-names: List of input clocks
	For VDMA:
	Required elements: "s_axi_lite_aclk"
	Optional elements: "m_axi_mm2s_aclk" "m_axi_s2mm_aclk",
			   "m_axis_mm2s_aclk", "s_axis_s2mm_aclk"
	For CDMA:
	Required elements: "s_axi_lite_aclk", "m_axi_aclk"
	FOR AXIDMA:
	Required elements: "s_axi_lite_aclk"
	Optional elements: "m_axi_mm2s_aclk", "m_axi_s2mm_aclk",
			   "m_axi_sg_aclk"

Required properties for VDMA:
- xlnx,num-fstores: Should be the number of framebuffers as configured in h/w.
@@ -60,6 +72,9 @@ axi_vdma_0: axivdma@40030000 {
	xlnx,num-fstores = <0x8>;
	xlnx,flush-fsync = <0x1>;
	xlnx,addrwidth = <0x20>;
	clocks = <&clk 0>, <&clk 1>, <&clk 2>, <&clk 3>, <&clk 4>;
	clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk",
		      "m_axis_mm2s_aclk", "s_axis_s2mm_aclk";
	dma-channel@40030000 {
		compatible = "xlnx,axi-vdma-mm2s-channel";
		interrupts = < 0 54 4 >;