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Commit 4a9117b1 authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Greg Kroah-Hartman
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pwm: mtk-disp: Disable shadow registers before setting backlight values 



[ Upstream commit 36dd7f530ae7d9ce9e853ffb8aa337de65c6600b ]

If shadow registers usage is not desired, disable that before performing
any write to CON0/1 registers in the .apply() callback, otherwise we may
lose clkdiv or period/width updates.

Fixes: cd4b45ac ("pwm: Add MediaTek MT2701 display PWM driver support")
Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarNícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: default avatarNícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: default avatarAlexandre Mergnat <amergnat@baylibre.com>
Tested-by: default avatarAlexandre Mergnat <amergnat@baylibre.com>
Signed-off-by: default avatarThierry Reding <thierry.reding@gmail.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent a9c39726

drivers/pwm/pwm-mtk-disp.c

+13 −11
Original line number Diff line number Diff line
@@ -122,6 +122,19 @@ static int mtk_disp_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, 
	high_width = div64_u64(rate * duty_ns, div);

	value = period | (high_width << PWM_HIGH_WIDTH_SHIFT);



	if (mdp->data->bls_debug && !mdp->data->has_commit) {

		/*

		 * For MT2701, disable double buffer before writing register

		 * and select manual mode and use PWM_PERIOD/PWM_HIGH_WIDTH.

		 */

		mtk_disp_pwm_update_bits(mdp, mdp->data->bls_debug,

					 mdp->data->bls_debug_mask,

					 mdp->data->bls_debug_mask);

		mtk_disp_pwm_update_bits(mdp, mdp->data->con0,

					 mdp->data->con0_sel,

					 mdp->data->con0_sel);

	}



	mtk_disp_pwm_update_bits(mdp, mdp->data->con0,

				 PWM_CLKDIV_MASK,

				 clk_div << PWM_CLKDIV_SHIFT);
@@ -136,17 +149,6 @@ static int mtk_disp_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, 
		mtk_disp_pwm_update_bits(mdp, mdp->data->commit,

					 mdp->data->commit_mask,

					 0x0);

	} else {

		/*

		 * For MT2701, disable double buffer before writing register

		 * and select manual mode and use PWM_PERIOD/PWM_HIGH_WIDTH.

		 */

		mtk_disp_pwm_update_bits(mdp, mdp->data->bls_debug,

					 mdp->data->bls_debug_mask,

					 mdp->data->bls_debug_mask);

		mtk_disp_pwm_update_bits(mdp, mdp->data->con0,

					 mdp->data->con0_sel,

					 mdp->data->con0_sel);

	}



	clk_disable_unprepare(mdp->clk_mm);