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Commit 4a570db5 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin
Browse files

drm/i915: Rename intel_engine_cs struct members



below and a couple manual fixups.

@@
identifier I, J;
@@
struct I {
...
- struct intel_engine_cs *J;
+ struct intel_engine_cs *engine;
...
}
@@
identifier I, J;
@@
struct I {
...
- struct intel_engine_cs J;
+ struct intel_engine_cs engine;
...
}
@@
struct drm_i915_private *d;
@@
(
- d->ring
+ d->engine
)
@@
struct i915_execbuffer_params *p;
@@
(
- p->ring
+ p->engine
)
@@
struct intel_ringbuffer *r;
@@
(
- r->ring
+ r->engine
)
@@
struct drm_i915_gem_request *req;
@@
(
- req->ring
+ req->engine
)

v2: Script missed the tracepoint code - fixed up by hand.

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 0bc40be8
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+1 −1
Original line number Diff line number Diff line
@@ -984,7 +984,7 @@ static int i915_hws_info(struct seq_file *m, void *data)
	const u32 *hws;
	int i;

	engine = &dev_priv->ring[(uintptr_t)node->info_ent->data];
	engine = &dev_priv->engine[(uintptr_t)node->info_ent->data];
	hws = engine->status_page.page_addr;
	if (hws == NULL)
		return 0;
+4 −4
Original line number Diff line number Diff line
@@ -87,16 +87,16 @@ static int i915_getparam(struct drm_device *dev, void *data,
		value = 1;
		break;
	case I915_PARAM_HAS_BSD:
		value = intel_ring_initialized(&dev_priv->ring[VCS]);
		value = intel_ring_initialized(&dev_priv->engine[VCS]);
		break;
	case I915_PARAM_HAS_BLT:
		value = intel_ring_initialized(&dev_priv->ring[BCS]);
		value = intel_ring_initialized(&dev_priv->engine[BCS]);
		break;
	case I915_PARAM_HAS_VEBOX:
		value = intel_ring_initialized(&dev_priv->ring[VECS]);
		value = intel_ring_initialized(&dev_priv->engine[VECS]);
		break;
	case I915_PARAM_HAS_BSD2:
		value = intel_ring_initialized(&dev_priv->ring[VCS2]);
		value = intel_ring_initialized(&dev_priv->engine[VCS2]);
		break;
	case I915_PARAM_HAS_RELAXED_FENCING:
		value = 1;
+9 −9
Original line number Diff line number Diff line
@@ -1652,7 +1652,7 @@ struct i915_execbuffer_params {
	uint32_t                        dispatch_flags;
	uint32_t                        args_batch_start_offset;
	uint64_t                        batch_obj_vm_offset;
	struct intel_engine_cs          *ring;
	struct intel_engine_cs *engine;
	struct drm_i915_gem_object      *batch_obj;
	struct intel_context            *ctx;
	struct drm_i915_gem_request     *request;
@@ -1704,7 +1704,7 @@ struct drm_i915_private {
	wait_queue_head_t gmbus_wait_queue;

	struct pci_dev *bridge_dev;
	struct intel_engine_cs ring[I915_NUM_RINGS];
	struct intel_engine_cs engine[I915_NUM_RINGS];
	struct drm_i915_gem_object *semaphore_obj;
	uint32_t last_seqno, next_seqno;

@@ -1969,7 +1969,7 @@ static inline struct drm_i915_private *guc_to_i915(struct intel_guc *guc)
/* Iterate over initialised rings */
#define for_each_ring(ring__, dev_priv__, i__) \
	for ((i__) = 0; (i__) < I915_NUM_RINGS; (i__)++) \
		for_each_if ((((ring__) = &(dev_priv__)->ring[(i__)]), intel_ring_initialized((ring__))))
		for_each_if ((((ring__) = &(dev_priv__)->engine[(i__)]), intel_ring_initialized((ring__))))

enum hdmi_force_audio {
	HDMI_AUDIO_OFF_DVI = -2,	/* no aux data for HDMI-DVI converter */
@@ -2184,7 +2184,7 @@ struct drm_i915_gem_request {

	/** On Which ring this request was generated */
	struct drm_i915_private *i915;
	struct intel_engine_cs *ring;
	struct intel_engine_cs *engine;

	 /** GEM sequence number associated with the previous request,
	  * when the HWS breadcrumb is equal to this the GPU is processing
@@ -2279,7 +2279,7 @@ i915_gem_request_get_seqno(struct drm_i915_gem_request *req)
static inline struct intel_engine_cs *
i915_gem_request_get_ring(struct drm_i915_gem_request *req)
{
	return req ? req->ring : NULL;
	return req ? req->engine : NULL;
}

static inline struct drm_i915_gem_request *
@@ -2293,7 +2293,7 @@ i915_gem_request_reference(struct drm_i915_gem_request *req)
static inline void
i915_gem_request_unreference(struct drm_i915_gem_request *req)
{
	WARN_ON(!mutex_is_locked(&req->ring->dev->struct_mutex));
	WARN_ON(!mutex_is_locked(&req->engine->dev->struct_mutex));
	kref_put(&req->ref, i915_gem_request_free);
}

@@ -2305,7 +2305,7 @@ i915_gem_request_unreference__unlocked(struct drm_i915_gem_request *req)
	if (!req)
		return;

	dev = req->ring->dev;
	dev = req->engine->dev;
	if (kref_put_mutex(&req->ref, i915_gem_request_free, &dev->struct_mutex))
		mutex_unlock(&dev->struct_mutex);
}
@@ -2949,14 +2949,14 @@ i915_seqno_passed(uint32_t seq1, uint32_t seq2)
static inline bool i915_gem_request_started(struct drm_i915_gem_request *req,
					   bool lazy_coherency)
{
	u32 seqno = req->ring->get_seqno(req->ring, lazy_coherency);
	u32 seqno = req->engine->get_seqno(req->engine, lazy_coherency);
	return i915_seqno_passed(seqno, req->previous_seqno);
}

static inline bool i915_gem_request_completed(struct drm_i915_gem_request *req,
					      bool lazy_coherency)
{
	u32 seqno = req->ring->get_seqno(req->ring, lazy_coherency);
	u32 seqno = req->engine->get_seqno(req->engine, lazy_coherency);
	return i915_seqno_passed(seqno, req->seqno);
}

+19 −19
Original line number Diff line number Diff line
@@ -1193,7 +1193,7 @@ static int __i915_spin_request(struct drm_i915_gem_request *req, int state)
	 * takes to sleep on a request, on the order of a microsecond.
	 */

	if (req->ring->irq_refcount)
	if (req->engine->irq_refcount)
		return -EBUSY;

	/* Only spin if we know the GPU is processing this request */
@@ -1381,7 +1381,7 @@ int i915_gem_request_add_to_client(struct drm_i915_gem_request *req,
	if (req->file_priv)
		return -EINVAL;

	dev_private = req->ring->dev->dev_private;
	dev_private = req->engine->dev->dev_private;
	file_priv = file->driver_priv;

	spin_lock(&file_priv->mm.lock);
@@ -1434,7 +1434,7 @@ static void i915_gem_request_retire(struct drm_i915_gem_request *request)
static void
__i915_gem_request_retire__upto(struct drm_i915_gem_request *req)
{
	struct intel_engine_cs *engine = req->ring;
	struct intel_engine_cs *engine = req->engine;
	struct drm_i915_gem_request *tmp;

	lockdep_assert_held(&engine->dev->struct_mutex);
@@ -1466,7 +1466,7 @@ i915_wait_request(struct drm_i915_gem_request *req)

	BUG_ON(req == NULL);

	dev = req->ring->dev;
	dev = req->engine->dev;
	dev_priv = dev->dev_private;
	interruptible = dev_priv->mm.interruptible;

@@ -1505,7 +1505,7 @@ i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj,
			if (ret)
				return ret;

			i = obj->last_write_req->ring->id;
			i = obj->last_write_req->engine->id;
			if (obj->last_read_req[i] == obj->last_write_req)
				i915_gem_object_retire__read(obj, i);
			else
@@ -1532,7 +1532,7 @@ static void
i915_gem_object_retire_request(struct drm_i915_gem_object *obj,
			       struct drm_i915_gem_request *req)
{
	int ring = req->ring->id;
	int ring = req->engine->id;

	if (obj->last_read_req[ring] == req)
		i915_gem_object_retire__read(obj, ring);
@@ -2423,7 +2423,7 @@ static void
i915_gem_object_retire__write(struct drm_i915_gem_object *obj)
{
	RQ_BUG_ON(obj->last_write_req == NULL);
	RQ_BUG_ON(!(obj->active & intel_ring_flag(obj->last_write_req->ring)));
	RQ_BUG_ON(!(obj->active & intel_ring_flag(obj->last_write_req->engine)));

	i915_gem_request_assign(&obj->last_write_req, NULL);
	intel_fb_obj_flush(obj, true, ORIGIN_CS);
@@ -2440,7 +2440,7 @@ i915_gem_object_retire__read(struct drm_i915_gem_object *obj, int ring)
	list_del_init(&obj->ring_list[ring]);
	i915_gem_request_assign(&obj->last_read_req[ring], NULL);

	if (obj->last_write_req && obj->last_write_req->ring->id == ring)
	if (obj->last_write_req && obj->last_write_req->engine->id == ring)
		i915_gem_object_retire__write(obj);

	obj->active &= ~(1 << ring);
@@ -2551,7 +2551,7 @@ void __i915_add_request(struct drm_i915_gem_request *request,
	if (WARN_ON(request == NULL))
		return;

	engine = request->ring;
	engine = request->engine;
	dev_priv = engine->dev->dev_private;
	ringbuf = request->ringbuf;

@@ -2680,7 +2680,7 @@ void i915_gem_request_free(struct kref *req_ref)

	if (ctx) {
		if (i915.enable_execlists && ctx != req->i915->kernel_context)
			intel_lr_context_unpin(ctx, req->ring);
			intel_lr_context_unpin(ctx, req->engine);

		i915_gem_context_unreference(ctx);
	}
@@ -2712,7 +2712,7 @@ __i915_gem_request_alloc(struct intel_engine_cs *engine,

	kref_init(&req->ref);
	req->i915 = dev_priv;
	req->ring = engine;
	req->engine = engine;
	req->ctx  = ctx;
	i915_gem_context_reference(req->ctx);

@@ -4364,10 +4364,10 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data,

			req = obj->last_read_req[i];
			if (req)
				args->busy |= 1 << (16 + req->ring->exec_id);
				args->busy |= 1 << (16 + req->engine->exec_id);
		}
		if (obj->last_write_req)
			args->busy |= obj->last_write_req->ring->exec_id;
			args->busy |= obj->last_write_req->engine->exec_id;
	}

unref:
@@ -4697,7 +4697,7 @@ i915_gem_suspend(struct drm_device *dev)

int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
{
	struct intel_engine_cs *engine = req->ring;
	struct intel_engine_cs *engine = req->engine;
	struct drm_device *dev = engine->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 *remap_info = dev_priv->l3_parity.remap_info[slice];
@@ -4814,13 +4814,13 @@ int i915_gem_init_rings(struct drm_device *dev)
	return 0;

cleanup_vebox_ring:
	intel_cleanup_ring_buffer(&dev_priv->ring[VECS]);
	intel_cleanup_ring_buffer(&dev_priv->engine[VECS]);
cleanup_blt_ring:
	intel_cleanup_ring_buffer(&dev_priv->ring[BCS]);
	intel_cleanup_ring_buffer(&dev_priv->engine[BCS]);
cleanup_bsd_ring:
	intel_cleanup_ring_buffer(&dev_priv->ring[VCS]);
	intel_cleanup_ring_buffer(&dev_priv->engine[VCS]);
cleanup_render_ring:
	intel_cleanup_ring_buffer(&dev_priv->ring[RCS]);
	intel_cleanup_ring_buffer(&dev_priv->engine[RCS]);

	return ret;
}
@@ -5056,7 +5056,7 @@ i915_gem_load_init(struct drm_device *dev)
	INIT_LIST_HEAD(&dev_priv->mm.bound_list);
	INIT_LIST_HEAD(&dev_priv->mm.fence_list);
	for (i = 0; i < I915_NUM_RINGS; i++)
		init_ring_lists(&dev_priv->ring[i]);
		init_ring_lists(&dev_priv->engine[i]);
	for (i = 0; i < I915_MAX_NUM_FENCES; i++)
		INIT_LIST_HEAD(&dev_priv->fence_regs[i].lru_list);
	INIT_DELAYED_WORK(&dev_priv->mm.retire_work,
+12 −12
Original line number Diff line number Diff line
@@ -346,7 +346,7 @@ void i915_gem_context_reset(struct drm_device *dev)
	}

	for (i = 0; i < I915_NUM_RINGS; i++) {
		struct intel_engine_cs *engine = &dev_priv->ring[i];
		struct intel_engine_cs *engine = &dev_priv->engine[i];

		if (engine->last_context) {
			i915_gem_context_unpin(engine->last_context, engine);
@@ -421,13 +421,13 @@ void i915_gem_context_fini(struct drm_device *dev)
		 * to default context. So we need to unreference the base object once
		 * to offset the do_switch part, so that i915_gem_context_unreference()
		 * can then free the base object correctly. */
		WARN_ON(!dev_priv->ring[RCS].last_context);
		WARN_ON(!dev_priv->engine[RCS].last_context);

		i915_gem_object_ggtt_unpin(dctx->legacy_hw_ctx.rcs_state);
	}

	for (i = I915_NUM_RINGS; --i >= 0;) {
		struct intel_engine_cs *engine = &dev_priv->ring[i];
		struct intel_engine_cs *engine = &dev_priv->engine[i];

		if (engine->last_context) {
			i915_gem_context_unpin(engine->last_context, engine);
@@ -441,7 +441,7 @@ void i915_gem_context_fini(struct drm_device *dev)

int i915_gem_context_enable(struct drm_i915_gem_request *req)
{
	struct intel_engine_cs *engine = req->ring;
	struct intel_engine_cs *engine = req->engine;
	int ret;

	if (i915.enable_execlists) {
@@ -510,7 +510,7 @@ i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
static inline int
mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
{
	struct intel_engine_cs *engine = req->ring;
	struct intel_engine_cs *engine = req->engine;
	u32 flags = hw_flags | MI_MM_SPACE_GTT;
	const int num_rings =
		/* Use an extended w/a on ivb+ if signalling from other rings */
@@ -625,7 +625,7 @@ needs_pd_load_pre(struct intel_engine_cs *engine, struct intel_context *to)
	if (INTEL_INFO(engine->dev)->gen < 8)
		return true;

	if (engine != &dev_priv->ring[RCS])
	if (engine != &dev_priv->engine[RCS])
		return true;

	return false;
@@ -643,7 +643,7 @@ needs_pd_load_post(struct intel_engine_cs *engine, struct intel_context *to,
	if (!IS_GEN8(engine->dev))
		return false;

	if (engine != &dev_priv->ring[RCS])
	if (engine != &dev_priv->engine[RCS])
		return false;

	if (hw_flags & MI_RESTORE_INHIBIT)
@@ -655,14 +655,14 @@ needs_pd_load_post(struct intel_engine_cs *engine, struct intel_context *to,
static int do_switch(struct drm_i915_gem_request *req)
{
	struct intel_context *to = req->ctx;
	struct intel_engine_cs *engine = req->ring;
	struct intel_engine_cs *engine = req->engine;
	struct drm_i915_private *dev_priv = engine->dev->dev_private;
	struct intel_context *from = engine->last_context;
	u32 hw_flags = 0;
	bool uninitialized = false;
	int ret, i;

	if (from != NULL && engine == &dev_priv->ring[RCS]) {
	if (from != NULL && engine == &dev_priv->engine[RCS]) {
		BUG_ON(from->legacy_hw_ctx.rcs_state == NULL);
		BUG_ON(!i915_gem_obj_is_pinned(from->legacy_hw_ctx.rcs_state));
	}
@@ -671,7 +671,7 @@ static int do_switch(struct drm_i915_gem_request *req)
		return 0;

	/* Trying to pin first makes error handling easier. */
	if (engine == &dev_priv->ring[RCS]) {
	if (engine == &dev_priv->engine[RCS]) {
		ret = i915_gem_obj_ggtt_pin(to->legacy_hw_ctx.rcs_state,
					    get_context_alignment(engine->dev),
					    0);
@@ -700,7 +700,7 @@ static int do_switch(struct drm_i915_gem_request *req)
		to->ppgtt->pd_dirty_rings &= ~intel_ring_flag(engine);
	}

	if (engine != &dev_priv->ring[RCS]) {
	if (engine != &dev_priv->engine[RCS]) {
		if (from)
			i915_gem_context_unreference(from);
		goto done;
@@ -828,7 +828,7 @@ static int do_switch(struct drm_i915_gem_request *req)
 */
int i915_switch_context(struct drm_i915_gem_request *req)
{
	struct intel_engine_cs *engine = req->ring;
	struct intel_engine_cs *engine = req->engine;
	struct drm_i915_private *dev_priv = engine->dev->dev_private;

	WARN_ON(i915.enable_execlists);
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