Loading drivers/gpu/drm/nouveau/include/nvif/cla06f.h +1 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ struct kepler_channel_gpfifo_a_v0 { #define NVA06F_V0_ENGINE_MSPDEC 0x00000020 #define NVA06F_V0_ENGINE_MSPPP 0x00000040 #define NVA06F_V0_ENGINE_MSENC 0x00000080 #define NVA06F_V0_ENGINE_VIC 0x00000100 #define NVA06F_V0_ENGINE_NVDEC 0x00000200 #define NVA06F_V0_ENGINE_NVENC0 0x00000400 #define NVA06F_V0_ENGINE_NVENC1 0x00000800 Loading drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c +2 −0 Original line number Diff line number Diff line Loading @@ -67,6 +67,7 @@ gk104_fifo_gpfifo_engine_addr(struct nvkm_engine *engine) case NVKM_ENGINE_MSPDEC: return 0x0250; case NVKM_ENGINE_MSPPP : return 0x0260; case NVKM_ENGINE_MSVLD : return 0x0270; case NVKM_ENGINE_VIC : return 0x0280; case NVKM_ENGINE_MSENC : return 0x0290; case NVKM_ENGINE_NVDEC : return 0x02100270; case NVKM_ENGINE_NVENC0: return 0x02100290; Loading Loading @@ -346,6 +347,7 @@ gk104_fifo_gpfifo[] = { { NVA06F_V0_ENGINE_MSPDEC, BIT_ULL(NVKM_ENGINE_MSPDEC) }, { NVA06F_V0_ENGINE_MSPPP , BIT_ULL(NVKM_ENGINE_MSPPP ) }, { NVA06F_V0_ENGINE_MSENC , BIT_ULL(NVKM_ENGINE_MSENC ) }, { NVA06F_V0_ENGINE_VIC , BIT_ULL(NVKM_ENGINE_VIC ) }, { NVA06F_V0_ENGINE_NVDEC , BIT_ULL(NVKM_ENGINE_NVDEC ) }, { NVA06F_V0_ENGINE_NVENC0, BIT_ULL(NVKM_ENGINE_NVENC0) }, { NVA06F_V0_ENGINE_NVENC1, BIT_ULL(NVKM_ENGINE_NVENC1) }, Loading Loading
drivers/gpu/drm/nouveau/include/nvif/cla06f.h +1 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ struct kepler_channel_gpfifo_a_v0 { #define NVA06F_V0_ENGINE_MSPDEC 0x00000020 #define NVA06F_V0_ENGINE_MSPPP 0x00000040 #define NVA06F_V0_ENGINE_MSENC 0x00000080 #define NVA06F_V0_ENGINE_VIC 0x00000100 #define NVA06F_V0_ENGINE_NVDEC 0x00000200 #define NVA06F_V0_ENGINE_NVENC0 0x00000400 #define NVA06F_V0_ENGINE_NVENC1 0x00000800 Loading
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c +2 −0 Original line number Diff line number Diff line Loading @@ -67,6 +67,7 @@ gk104_fifo_gpfifo_engine_addr(struct nvkm_engine *engine) case NVKM_ENGINE_MSPDEC: return 0x0250; case NVKM_ENGINE_MSPPP : return 0x0260; case NVKM_ENGINE_MSVLD : return 0x0270; case NVKM_ENGINE_VIC : return 0x0280; case NVKM_ENGINE_MSENC : return 0x0290; case NVKM_ENGINE_NVDEC : return 0x02100270; case NVKM_ENGINE_NVENC0: return 0x02100290; Loading Loading @@ -346,6 +347,7 @@ gk104_fifo_gpfifo[] = { { NVA06F_V0_ENGINE_MSPDEC, BIT_ULL(NVKM_ENGINE_MSPDEC) }, { NVA06F_V0_ENGINE_MSPPP , BIT_ULL(NVKM_ENGINE_MSPPP ) }, { NVA06F_V0_ENGINE_MSENC , BIT_ULL(NVKM_ENGINE_MSENC ) }, { NVA06F_V0_ENGINE_VIC , BIT_ULL(NVKM_ENGINE_VIC ) }, { NVA06F_V0_ENGINE_NVDEC , BIT_ULL(NVKM_ENGINE_NVDEC ) }, { NVA06F_V0_ENGINE_NVENC0, BIT_ULL(NVKM_ENGINE_NVENC0) }, { NVA06F_V0_ENGINE_NVENC1, BIT_ULL(NVKM_ENGINE_NVENC1) }, Loading