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Commit 4a0a0202 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Clear VLV_MASTER_IER around irq processing 



Like on CHV, let's clear out the master irq enable bit when we ack
GT/PM interrupts. This will allow GT/PM interrupts to re-raise the
CPU interrupt if we fail to clear all the bits from the IIR(s).

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1460571598-24452-5-git-send-email-ville.syrjala@linux.intel.com


Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 7ce4d1f2

drivers/gpu/drm/i915/i915_irq.c

+10 −6
Original line number Diff line number Diff line
@@ -1781,13 +1781,7 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg) 
		/* Find, clear, then process each source of interrupt */



		gt_iir = I915_READ(GTIIR);

		if (gt_iir)

			I915_WRITE(GTIIR, gt_iir);



		pm_iir = I915_READ(GEN6_PMIIR);

		if (pm_iir)

			I915_WRITE(GEN6_PMIIR, pm_iir);



		iir = I915_READ(VLV_IIR);



		if (gt_iir == 0 && pm_iir == 0 && iir == 0)
@@ -1795,6 +1789,13 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg) 


		ret = IRQ_HANDLED;



		I915_WRITE(VLV_MASTER_IER, 0);



		if (gt_iir)

			I915_WRITE(GTIIR, gt_iir);

		if (pm_iir)

			I915_WRITE(GEN6_PMIIR, pm_iir);



		if (gt_iir)

			snb_gt_irq_handler(dev, dev_priv, gt_iir);

		if (pm_iir)
@@ -1813,6 +1814,9 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg) 
		 */

		if (iir)

			I915_WRITE(VLV_IIR, iir);



		I915_WRITE(VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);

		POSTING_READ(VLV_MASTER_IER);

	}



out: