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Commit 49cd97a3 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Start moving the cdclk stuff into a distinct state structure 



Introduce intel_cdclk state which for now will track the cdclk
frequency, the vco frequency and the reference frequency (not sure we
want the last one, but I put it there anyway). We'll also make the
.get_cdclk() function fill out this state structure rather than
just returning the current cdclk frequency.

One immediate benefit is that calling .get_cdclk() will no longer
clobber state stored under dev_priv unless ex[plicitly told to do
so. Previously it clobbered the vco and reference clocks stored
there on some platforms.

We'll expand the use of this structure to actually precomputing the
state and whatnot later.

v2: Constify intel_cdclk_state_compare()
v3: Document intel_cdclk_state_compare()
v4: Deal with i945gm_get_cdclk()

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarAnder Conselvan de Oliveira <conselvan2@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170207183345.19763-1-ville.syrjala@linux.intel.com
parent 8f0cfa4d

drivers/gpu/drm/i915/i915_debugfs.c

+1 −1
Original line number Diff line number Diff line
@@ -1281,7 +1281,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused) 
		seq_puts(m, "no P-state info available\n");

	}



	seq_printf(m, "Current CD clock frequency: %d kHz\n", dev_priv->cdclk_freq);

	seq_printf(m, "Current CD clock frequency: %d kHz\n", dev_priv->cdclk.hw.cdclk);

	seq_printf(m, "Max CD clock frequency: %d kHz\n", dev_priv->max_cdclk_freq);

	seq_printf(m, "Max pixel clock frequency: %d kHz\n", dev_priv->max_dotclk_freq);

drivers/gpu/drm/i915/i915_drv.h

+10 −4
Original line number Diff line number Diff line
@@ -600,9 +600,11 @@ struct intel_initial_plane_config; 
struct intel_crtc;

struct intel_limit;

struct dpll;

struct intel_cdclk_state;



struct drm_i915_display_funcs {

	int (*get_cdclk)(struct drm_i915_private *dev_priv);

	void (*get_cdclk)(struct drm_i915_private *dev_priv,

			  struct intel_cdclk_state *cdclk_state);

	int (*get_fifo_size)(struct drm_i915_private *dev_priv, int plane);

	int (*compute_pipe_wm)(struct intel_crtc_state *cstate);

	int (*compute_intermediate_wm)(struct drm_device *dev,
@@ -2060,6 +2062,10 @@ struct i915_oa_ops { 
	bool (*oa_buffer_is_empty)(struct drm_i915_private *dev_priv);

};



struct intel_cdclk_state {

	unsigned int cdclk, vco, ref;

};



struct drm_i915_private {

	struct drm_device drm;
@@ -2164,7 +2170,7 @@ struct drm_i915_private { 


	unsigned int fsb_freq, mem_freq, is_ddr3;

	unsigned int skl_preferred_vco_freq;

	unsigned int cdclk_freq, max_cdclk_freq;

	unsigned int max_cdclk_freq;



	/*

	 * For reading holding any crtc lock is sufficient,
@@ -2178,8 +2184,8 @@ struct drm_i915_private { 
	unsigned int czclk_freq;



	struct {

		unsigned int vco, ref;

	} cdclk_pll;

		struct intel_cdclk_state hw;

	} cdclk;



	/**

	 * wq - Driver workqueue for GEM.

drivers/gpu/drm/i915/intel_audio.c

+1 −1
Original line number Diff line number Diff line
@@ -734,7 +734,7 @@ static int i915_audio_component_get_cdclk_freq(struct device *kdev) 
	if (WARN_ON_ONCE(!HAS_DDI(dev_priv)))

		return -ENODEV;



	return dev_priv->cdclk_freq;

	return dev_priv->cdclk.hw.cdclk;

}



/*

drivers/gpu/drm/i915/intel_cdclk.c

+226 −156

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drivers/gpu/drm/i915/intel_display.c

+9 −9

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