Loading arch/sh/drivers/pci/Kconfig +1 −1 Original line number Diff line number Diff line Loading @@ -23,7 +23,7 @@ config PCI_NEW bool depends on PCI default y if CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7780 || \ CPU_SUBTYPE_SH7785 CPU_SUBTYPE_SH7785 || CPU_SH5 # This is also board-specific config PCI_AUTO Loading arch/sh/drivers/pci/ops-cayman.c +0 −11 Original line number Diff line number Diff line Loading @@ -75,14 +75,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin) return result; } struct pci_channel board_pci_channels[] = { { sh5_pci_init, &sh5_pci_ops, NULL, NULL, 0, 0xff }, { NULL, NULL, NULL, 0, 0 }, }; int __init pcibios_init_platform(void) { return sh5pci_init(__pa(memory_start), __pa(memory_end) - __pa(memory_start)); } arch/sh/drivers/pci/pci-sh5.c +22 −36 Original line number Diff line number Diff line Loading @@ -27,12 +27,6 @@ unsigned long pcicr_virt; unsigned long PCI_IO_AREA; int __init sh5_pci_init(struct pci_channel *chan) { pr_debug("PCI: Starting intialization.\n"); return pcibios_init_platform(); } /* Rounds a number UP to the nearest power of two. Used for * sizing the PCI window. */ Loading Loading @@ -95,8 +89,21 @@ static irqreturn_t pcish5_serr_irq(int irq, void *dev_id) return IRQ_NONE; } int __init sh5pci_init(unsigned long memStart, unsigned long memSize) static struct resource sh5_io_resource = { /* place holder */ }; static struct resource sh5_mem_resource = { /* place holder */ }; static struct pci_channel sh5pci_controller = { .pci_ops = &sh5_pci_ops, .mem_resource = &sh5_mem_resource, .mem_offset = 0x00000000, .io_resource = &sh5_io_resource, .io_offset = 0x00000000, }; static int __init sh5pci_init(void) { unsigned long memStart = __pa(memory_start); unsigned long memSize = __pa(memory_end) - memStart; u32 lsr0; u32 uval; Loading Loading @@ -203,35 +210,14 @@ int __init sh5pci_init(unsigned long memStart, unsigned long memSize) SH5PCI_WRITE(AINTM, ~0); SH5PCI_WRITE(PINTM, ~0); return 0; } sh5_io_resource.start = PCI_IO_AREA; sh5_io_resource.end = PCI_IO_AREA + 0x10000; #define xPCIBIOS_MIN_IO board_pci_channels->io_resource->start #define xPCIBIOS_MIN_MEM board_pci_channels->mem_resource->start sh5_mem_resource.start = memStart; sh5_mem_resource.end = memStart + memSize; void __devinit pcibios_fixup_bus(struct pci_bus *bus) { struct pci_dev *dev = bus->self; int i; if (dev) { for (i= 0; i < 3; i++) { bus->resource[i] = &dev->resource[PCI_BRIDGE_RESOURCES+i]; bus->resource[i]->name = bus->name; } bus->resource[0]->flags |= IORESOURCE_IO; bus->resource[1]->flags |= IORESOURCE_MEM; /* For now, propagate host limits to the bus; * we'll adjust them later. */ bus->resource[0]->end = 64*1024 - 1 ; bus->resource[1]->end = xPCIBIOS_MIN_MEM+(256*1024*1024)-1; bus->resource[0]->start = xPCIBIOS_MIN_IO; bus->resource[1]->start = xPCIBIOS_MIN_MEM; /* Turn off downstream PF memory address range by default */ bus->resource[2]->start = 1024*1024; bus->resource[2]->end = bus->resource[2]->start - 1; } register_pci_controller(&sh5pci_controller); return 0; } arch_initcall(sh5pci_init); arch/sh/drivers/pci/pci-sh5.h +0 −4 Original line number Diff line number Diff line Loading @@ -107,8 +107,4 @@ extern unsigned long pcicr_virt; extern struct pci_ops sh5_pci_ops; /* arch/sh/drivers/pci/pci-sh5.c */ int sh5_pci_init(struct pci_channel *chan); int sh5pci_init(unsigned long memStart, unsigned long memSize); #endif /* __PCI_SH5_H */ Loading
arch/sh/drivers/pci/Kconfig +1 −1 Original line number Diff line number Diff line Loading @@ -23,7 +23,7 @@ config PCI_NEW bool depends on PCI default y if CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7780 || \ CPU_SUBTYPE_SH7785 CPU_SUBTYPE_SH7785 || CPU_SH5 # This is also board-specific config PCI_AUTO Loading
arch/sh/drivers/pci/ops-cayman.c +0 −11 Original line number Diff line number Diff line Loading @@ -75,14 +75,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin) return result; } struct pci_channel board_pci_channels[] = { { sh5_pci_init, &sh5_pci_ops, NULL, NULL, 0, 0xff }, { NULL, NULL, NULL, 0, 0 }, }; int __init pcibios_init_platform(void) { return sh5pci_init(__pa(memory_start), __pa(memory_end) - __pa(memory_start)); }
arch/sh/drivers/pci/pci-sh5.c +22 −36 Original line number Diff line number Diff line Loading @@ -27,12 +27,6 @@ unsigned long pcicr_virt; unsigned long PCI_IO_AREA; int __init sh5_pci_init(struct pci_channel *chan) { pr_debug("PCI: Starting intialization.\n"); return pcibios_init_platform(); } /* Rounds a number UP to the nearest power of two. Used for * sizing the PCI window. */ Loading Loading @@ -95,8 +89,21 @@ static irqreturn_t pcish5_serr_irq(int irq, void *dev_id) return IRQ_NONE; } int __init sh5pci_init(unsigned long memStart, unsigned long memSize) static struct resource sh5_io_resource = { /* place holder */ }; static struct resource sh5_mem_resource = { /* place holder */ }; static struct pci_channel sh5pci_controller = { .pci_ops = &sh5_pci_ops, .mem_resource = &sh5_mem_resource, .mem_offset = 0x00000000, .io_resource = &sh5_io_resource, .io_offset = 0x00000000, }; static int __init sh5pci_init(void) { unsigned long memStart = __pa(memory_start); unsigned long memSize = __pa(memory_end) - memStart; u32 lsr0; u32 uval; Loading Loading @@ -203,35 +210,14 @@ int __init sh5pci_init(unsigned long memStart, unsigned long memSize) SH5PCI_WRITE(AINTM, ~0); SH5PCI_WRITE(PINTM, ~0); return 0; } sh5_io_resource.start = PCI_IO_AREA; sh5_io_resource.end = PCI_IO_AREA + 0x10000; #define xPCIBIOS_MIN_IO board_pci_channels->io_resource->start #define xPCIBIOS_MIN_MEM board_pci_channels->mem_resource->start sh5_mem_resource.start = memStart; sh5_mem_resource.end = memStart + memSize; void __devinit pcibios_fixup_bus(struct pci_bus *bus) { struct pci_dev *dev = bus->self; int i; if (dev) { for (i= 0; i < 3; i++) { bus->resource[i] = &dev->resource[PCI_BRIDGE_RESOURCES+i]; bus->resource[i]->name = bus->name; } bus->resource[0]->flags |= IORESOURCE_IO; bus->resource[1]->flags |= IORESOURCE_MEM; /* For now, propagate host limits to the bus; * we'll adjust them later. */ bus->resource[0]->end = 64*1024 - 1 ; bus->resource[1]->end = xPCIBIOS_MIN_MEM+(256*1024*1024)-1; bus->resource[0]->start = xPCIBIOS_MIN_IO; bus->resource[1]->start = xPCIBIOS_MIN_MEM; /* Turn off downstream PF memory address range by default */ bus->resource[2]->start = 1024*1024; bus->resource[2]->end = bus->resource[2]->start - 1; } register_pci_controller(&sh5pci_controller); return 0; } arch_initcall(sh5pci_init);
arch/sh/drivers/pci/pci-sh5.h +0 −4 Original line number Diff line number Diff line Loading @@ -107,8 +107,4 @@ extern unsigned long pcicr_virt; extern struct pci_ops sh5_pci_ops; /* arch/sh/drivers/pci/pci-sh5.c */ int sh5_pci_init(struct pci_channel *chan); int sh5pci_init(unsigned long memStart, unsigned long memSize); #endif /* __PCI_SH5_H */