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Commit 47bb8f71 authored by Heiner Kallweit's avatar Heiner Kallweit Committed by Wolfram Sang
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i2c: meson: use full 12 bits for clock divider



The clock divider has 12 bits, splitted into a 10 bit field and a
2 bit field. The extra 2 bits aren't used currently.

Change this to use the full 12 bits and warn if the requested
frequency is too low.

Signed-off-by: default avatarHeiner Kallweit <hkallweit1@gmail.com>
Acked-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: default avatarWolfram Sang <wsa@the-dreams.de>
parent 39b2ca68
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+14 −2
Original line number Original line Diff line number Diff line
@@ -35,7 +35,9 @@
#define REG_CTRL_STATUS		BIT(2)
#define REG_CTRL_STATUS		BIT(2)
#define REG_CTRL_ERROR		BIT(3)
#define REG_CTRL_ERROR		BIT(3)
#define REG_CTRL_CLKDIV_SHIFT	12
#define REG_CTRL_CLKDIV_SHIFT	12
#define REG_CTRL_CLKDIV_MASK	((BIT(10) - 1) << REG_CTRL_CLKDIV_SHIFT)
#define REG_CTRL_CLKDIV_MASK	GENMASK(21, 12)
#define REG_CTRL_CLKDIVEXT_SHIFT 28
#define REG_CTRL_CLKDIVEXT_MASK	GENMASK(29, 28)


#define I2C_TIMEOUT_MS		500
#define I2C_TIMEOUT_MS		500


@@ -134,8 +136,18 @@ static void meson_i2c_set_clk_div(struct meson_i2c *i2c, unsigned int freq)
	unsigned int div;
	unsigned int div;


	div = DIV_ROUND_UP(clk_rate, freq * 4);
	div = DIV_ROUND_UP(clk_rate, freq * 4);

	/* clock divider has 12 bits */
	if (div >= (1 << 12)) {
		dev_err(i2c->dev, "requested bus frequency too low\n");
		div = (1 << 12) - 1;
	}

	meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK,
	meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK,
			   div << REG_CTRL_CLKDIV_SHIFT);
			   (div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT);

	meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIVEXT_MASK,
			   (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT);


	dev_dbg(i2c->dev, "%s: clk %lu, freq %u, div %u\n", __func__,
	dev_dbg(i2c->dev, "%s: clk %lu, freq %u, div %u\n", __func__,
		clk_rate, freq, div);
		clk_rate, freq, div);