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Commit 478a3bab authored by Alan Stern's avatar Alan Stern Committed by Greg Kroah-Hartman
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[PATCH] USB: Always do usb-handoff



This revised patch (as586b) makes usb-handoff permanently true and no
longer a kernel boot parameter.  It also removes the piix3_usb quirk code;
that was nothing more than an early version of the USB handoff code
(written at a time when Intel's PIIX3 was about the only motherboard with
USB support).  And it adds identifiers for the three PCI USB controller
classes to pci_ids.h.

Signed-off-by: default avatarAlan Stern <stern@rowland.harvard.edu>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 46f116ea
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+0 −2
Original line number Diff line number Diff line
@@ -1517,8 +1517,6 @@ running once the system is up.
	uart6850=	[HW,OSS]
			Format: <io>,<irq>

	usb-handoff	[HW] Enable early USB BIOS -> OS handoff

	usbhid.mousepoll=
			[USBHID] The interval which mice are to be polled at.

+3 −43
Original line number Diff line number Diff line
@@ -23,33 +23,6 @@
#include <linux/acpi.h>


/*
 * PIIX3 USB: We have to disable USB interrupts that are
 * hardwired to PIRQD# and may be shared with an
 * external device.
 *
 * Legacy Support Register (LEGSUP):
 *     bit13:  USB PIRQ Enable (USBPIRQDEN),
 *     bit4:   Trap/SMI On IRQ Enable (USBSMIEN).
 *
 * We mask out all r/wc bits, too.
 */
static void __devinit quirk_piix3_usb(struct pci_dev *dev)
{
	u16 legsup;

	pci_read_config_word(dev, 0xc0, &legsup);
	legsup &= 0x50ef;
	pci_write_config_word(dev, 0xc0, legsup);
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_82371SB_2,	quirk_piix3_usb );
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_82371AB_2,	quirk_piix3_usb );


/* FIXME these should be the guts of hcd->reset() methods; resolve all
 * the differences between this version and the HCD's version.
 */

#define UHCI_USBLEGSUP		0xc0		/* legacy support */
#define UHCI_USBCMD		0		/* command register */
#define UHCI_USBINTR		4		/* interrupt register */
@@ -83,13 +56,6 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_2, qui
#define EHCI_USBLEGCTLSTS	4		/* legacy control/status */
#define EHCI_USBLEGCTLSTS_SOOE	(1 << 13)	/* SMI on ownership change */

int usb_early_handoff __devinitdata = 0;
static int __init usb_handoff_early(char *str)
{
	usb_early_handoff = 1;
	return 0;
}
__setup("usb-handoff", usb_handoff_early);

/*
 * Make sure the controller is completely inactive, unable to
@@ -320,17 +286,11 @@ static void __devinit quirk_usb_disable_ehci(struct pci_dev *pdev)

static void __devinit quirk_usb_early_handoff(struct pci_dev *pdev)
{
	if (!usb_early_handoff)
		return;

	if (pdev->class == ((PCI_CLASS_SERIAL_USB << 8) | 0x00)) { /* UHCI */
	if (pdev->class == PCI_CLASS_SERIAL_USB_UHCI)
		quirk_usb_handoff_uhci(pdev);
	} else if (pdev->class == ((PCI_CLASS_SERIAL_USB << 8) | 0x10)) { /* OHCI */
	else if (pdev->class == PCI_CLASS_SERIAL_USB_OHCI)
		quirk_usb_handoff_ohci(pdev);
	} else if (pdev->class == ((PCI_CLASS_SERIAL_USB << 8) | 0x20)) { /* EHCI */
	else if (pdev->class == PCI_CLASS_SERIAL_USB_EHCI)
		quirk_usb_disable_ehci(pdev);
}

	return;
}
DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_usb_early_handoff);
+0 −3
Original line number Diff line number Diff line
@@ -22,7 +22,6 @@ static inline void mpc_oem_pci_bus(struct mpc_config_bus *m,
{
}

extern int usb_early_handoff;
static inline int mps_oem_check(struct mp_config_table *mpc, char *oem, 
		char *productid)
{
@@ -32,7 +31,6 @@ static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
			 || !strncmp(productid, "RUTHLESS SMP", 12))){
		use_cyclone = 1; /*enable cyclone-timer*/
		setup_summit();
		usb_early_handoff = 1;
		return 1;
	}
	return 0;
@@ -46,7 +44,6 @@ static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
	     || !strncmp(oem_table_id, "EXA", 3))){
		use_cyclone = 1; /*enable cyclone-timer*/
		setup_summit();
		usb_early_handoff = 1;
		return 1;
	}
	return 0;
+3 −0
Original line number Diff line number Diff line
@@ -96,6 +96,9 @@
#define PCI_CLASS_SERIAL_ACCESS		0x0c01
#define PCI_CLASS_SERIAL_SSA		0x0c02
#define PCI_CLASS_SERIAL_USB		0x0c03
#define PCI_CLASS_SERIAL_USB_UHCI	0x0c0300
#define PCI_CLASS_SERIAL_USB_OHCI	0x0c0310
#define PCI_CLASS_SERIAL_USB_EHCI	0x0c0320
#define PCI_CLASS_SERIAL_FIBER		0x0c04
#define PCI_CLASS_SERIAL_SMBUS		0x0c05