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Commit 476eb491 authored by Grant Likely's avatar Grant Likely Committed by Benjamin Herrenschmidt
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powerpc/irq: Stop exporting irq_map



First step in eliminating irq_map[] table entirely

Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 65f47f13
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+3 −18
Original line number Diff line number Diff line
@@ -128,25 +128,10 @@ struct irq_host {
	struct device_node	*of_node;
};

/* The main irq map itself is an array of NR_IRQ entries containing the
 * associate host and irq number. An entry with a host of NULL is free.
 * An entry can be allocated if it's free, the allocator always then sets
 * hwirq first to the host's invalid irq number and then fills ops.
 */
struct irq_map_entry {
	irq_hw_number_t	hwirq;
	struct irq_host	*host;
};

extern struct irq_map_entry irq_map[NR_IRQS];

struct irq_data;
extern irq_hw_number_t irqd_to_hwirq(struct irq_data *d);
extern irq_hw_number_t virq_to_hw(unsigned int virq);

/* This will eventually -replace- virq_to_hw if/when we stash the
 * HW number in the irq_data itself. We use a macro so we can inline
 * it as irq_data isn't defined yet
 */
#define irq_data_to_hw(d) (irq_map[(d)->irq].hwirq)
extern struct irq_host *virq_to_host(unsigned int virq);

/**
 * irq_alloc_host - Allocate a new irq_host data structure
+24 −2
Original line number Diff line number Diff line
@@ -481,20 +481,42 @@ void do_softirq(void)
 * IRQ controller and virtual interrupts
 */

/* The main irq map itself is an array of NR_IRQ entries containing the
 * associate host and irq number. An entry with a host of NULL is free.
 * An entry can be allocated if it's free, the allocator always then sets
 * hwirq first to the host's invalid irq number and then fills ops.
 */
struct irq_map_entry {
	irq_hw_number_t	hwirq;
	struct irq_host	*host;
};

static LIST_HEAD(irq_hosts);
static DEFINE_RAW_SPINLOCK(irq_big_lock);
static unsigned int revmap_trees_allocated;
static DEFINE_MUTEX(revmap_trees_mutex);
struct irq_map_entry irq_map[NR_IRQS];
static struct irq_map_entry irq_map[NR_IRQS];
static unsigned int irq_virq_count = NR_IRQS;
static struct irq_host *irq_default_host;

irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
{
	return irq_map[d->irq].hwirq;
}
EXPORT_SYMBOL_GPL(irqd_to_hwirq);

irq_hw_number_t virq_to_hw(unsigned int virq)
{
	return irq_map[virq].hwirq;
}
EXPORT_SYMBOL_GPL(virq_to_hw);

struct irq_host *virq_to_host(unsigned int virq)
{
	return irq_map[virq].host;
}
EXPORT_SYMBOL_GPL(virq_to_host);

static int default_irq_host_match(struct irq_host *h, struct device_node *np)
{
	return h->of_node != NULL && h->of_node == np;
@@ -1103,7 +1125,7 @@ static int virq_debug_show(struct seq_file *m, void *private)
			struct irq_chip *chip;

			seq_printf(m, "%5d  ", i);
			seq_printf(m, "0x%05lx  ", virq_to_hw(i));
			seq_printf(m, "0x%05lx  ", irq_map[i].hwirq);

			chip = irq_desc_get_chip(desc);
			if (chip && chip->name)
+2 −2
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ irq_to_pic_bit(unsigned int irq)
static void
cpld_mask_irq(struct irq_data *d)
{
	unsigned int cpld_irq = (unsigned int)irq_map[d->irq].hwirq;
	unsigned int cpld_irq = (unsigned int)irqd_to_hwirq(d);
	void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);

	out_8(pic_mask,
@@ -71,7 +71,7 @@ cpld_mask_irq(struct irq_data *d)
static void
cpld_unmask_irq(struct irq_data *d)
{
	unsigned int cpld_irq = (unsigned int)irq_map[d->irq].hwirq;
	unsigned int cpld_irq = (unsigned int)irqd_to_hwirq(d);
	void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);

	out_8(pic_mask,
+2 −2
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ static void media5200_irq_unmask(struct irq_data *d)

	spin_lock_irqsave(&media5200_irq.lock, flags);
	val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE);
	val |= 1 << (MEDIA5200_IRQ_SHIFT + irq_map[d->irq].hwirq);
	val |= 1 << (MEDIA5200_IRQ_SHIFT + irqd_to_hwirq(d));
	out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val);
	spin_unlock_irqrestore(&media5200_irq.lock, flags);
}
@@ -68,7 +68,7 @@ static void media5200_irq_mask(struct irq_data *d)

	spin_lock_irqsave(&media5200_irq.lock, flags);
	val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE);
	val &= ~(1 << (MEDIA5200_IRQ_SHIFT + irq_map[d->irq].hwirq));
	val &= ~(1 << (MEDIA5200_IRQ_SHIFT + irqd_to_hwirq(d)));
	out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val);
	spin_unlock_irqrestore(&media5200_irq.lock, flags);
}
+13 −66
Original line number Diff line number Diff line
@@ -157,48 +157,30 @@ static inline void io_be_clrbit(u32 __iomem *addr, int bitno)
 */
static void mpc52xx_extirq_mask(struct irq_data *d)
{
	int irq;
	int l2irq;

	irq = irq_map[d->irq].hwirq;
	l2irq = irq & MPC52xx_IRQ_L2_MASK;

	int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
	io_be_clrbit(&intr->ctrl, 11 - l2irq);
}

static void mpc52xx_extirq_unmask(struct irq_data *d)
{
	int irq;
	int l2irq;

	irq = irq_map[d->irq].hwirq;
	l2irq = irq & MPC52xx_IRQ_L2_MASK;

	int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
	io_be_setbit(&intr->ctrl, 11 - l2irq);
}

static void mpc52xx_extirq_ack(struct irq_data *d)
{
	int irq;
	int l2irq;

	irq = irq_map[d->irq].hwirq;
	l2irq = irq & MPC52xx_IRQ_L2_MASK;

	int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
	io_be_setbit(&intr->ctrl, 27-l2irq);
}

static int mpc52xx_extirq_set_type(struct irq_data *d, unsigned int flow_type)
{
	u32 ctrl_reg, type;
	int irq;
	int l2irq;
	int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
	void *handler = handle_level_irq;

	irq = irq_map[d->irq].hwirq;
	l2irq = irq & MPC52xx_IRQ_L2_MASK;

	pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type);
	pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__,
		(int) irqd_to_hwirq(d), l2irq, flow_type);

	switch (flow_type) {
	case IRQF_TRIGGER_HIGH: type = 0; break;
@@ -237,23 +219,13 @@ static int mpc52xx_null_set_type(struct irq_data *d, unsigned int flow_type)

static void mpc52xx_main_mask(struct irq_data *d)
{
	int irq;
	int l2irq;

	irq = irq_map[d->irq].hwirq;
	l2irq = irq & MPC52xx_IRQ_L2_MASK;

	int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
	io_be_setbit(&intr->main_mask, 16 - l2irq);
}

static void mpc52xx_main_unmask(struct irq_data *d)
{
	int irq;
	int l2irq;

	irq = irq_map[d->irq].hwirq;
	l2irq = irq & MPC52xx_IRQ_L2_MASK;

	int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
	io_be_clrbit(&intr->main_mask, 16 - l2irq);
}

@@ -270,23 +242,13 @@ static struct irq_chip mpc52xx_main_irqchip = {
 */
static void mpc52xx_periph_mask(struct irq_data *d)
{
	int irq;
	int l2irq;

	irq = irq_map[d->irq].hwirq;
	l2irq = irq & MPC52xx_IRQ_L2_MASK;

	int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
	io_be_setbit(&intr->per_mask, 31 - l2irq);
}

static void mpc52xx_periph_unmask(struct irq_data *d)
{
	int irq;
	int l2irq;

	irq = irq_map[d->irq].hwirq;
	l2irq = irq & MPC52xx_IRQ_L2_MASK;

	int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
	io_be_clrbit(&intr->per_mask, 31 - l2irq);
}

@@ -303,34 +265,19 @@ static struct irq_chip mpc52xx_periph_irqchip = {
 */
static void mpc52xx_sdma_mask(struct irq_data *d)
{
	int irq;
	int l2irq;

	irq = irq_map[d->irq].hwirq;
	l2irq = irq & MPC52xx_IRQ_L2_MASK;

	int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
	io_be_setbit(&sdma->IntMask, l2irq);
}

static void mpc52xx_sdma_unmask(struct irq_data *d)
{
	int irq;
	int l2irq;

	irq = irq_map[d->irq].hwirq;
	l2irq = irq & MPC52xx_IRQ_L2_MASK;

	int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
	io_be_clrbit(&sdma->IntMask, l2irq);
}

static void mpc52xx_sdma_ack(struct irq_data *d)
{
	int irq;
	int l2irq;

	irq = irq_map[d->irq].hwirq;
	l2irq = irq & MPC52xx_IRQ_L2_MASK;

	int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
	out_be32(&sdma->IntPend, 1 << l2irq);
}

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