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Commit 46e595a1 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC driver updates from Arnd Bergmann:
 "Driver updates for ARM SoCs, these contain various things that touch
  the drivers/ directory but got merged through arm-soc for practical
  reasons:

   - Rockchip rk3368 gains power domain support
   - Small updates for the ARM spmi driver
   - The Atmel PMC driver saw a larger rework, touching both
     arch/arm/mach-at91 and drivers/clk/at91
   - All reset controller driver changes alway get merged through
     arm-soc, though this time the largest change is the addition of a
     MIPS pistachio reset driver
   - One bugfix for the NXP (formerly Freescale) i.MX weim bus driver"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (43 commits)
  bus: imx-weim: Take the 'status' property value into account
  clk: at91: remove useless includes
  clk: at91: pmc: remove useless capacities handling
  clk: at91: pmc: drop at91_pmc_base
  usb: gadget: atmel: access the PMC using regmap
  ARM: at91: remove useless includes and function prototypes
  ARM: at91: pm: move idle functions to pm.c
  ARM: at91: pm: find and remap the pmc
  ARM: at91: pm: simply call at91_pm_init
  clk: at91: pmc: move pmc structures to C file
  clk: at91: pmc: merge at91_pmc_init in atmel_pmc_probe
  clk: at91: remove IRQ handling and use polling
  clk: at91: make use of syscon/regmap internally
  clk: at91: make use of syscon to share PMC registers in several drivers
  hwmon: (scpi) add energy meter support
  firmware: arm_scpi: add support for 64-bit sensor values
  firmware: arm_scpi: decrease Tx timeout to 20ms
  firmware: arm_scpi: fix send_message and sensor_get_value for big-endian
  reset: sti: Make reset_control_ops const
  reset: zynq: Make reset_control_ops const
  ...
parents e3b1f64e 33b96d2c

Documentation/devicetree/bindings/bus/ti-gpmc.txt

+5 −0
Original line number Diff line number Diff line
@@ -46,6 +46,9 @@ Timing properties for child nodes. All are optional and default to 0. 
 - gpmc,adv-on-ns:	Assertion time

 - gpmc,adv-rd-off-ns:	Read deassertion time

 - gpmc,adv-wr-off-ns:	Write deassertion time

 - gpmc,adv-aad-mux-on-ns:	Assertion time for AAD

 - gpmc,adv-aad-mux-rd-off-ns:	Read deassertion time for AAD

 - gpmc,adv-aad-mux-wr-off-ns:	Write deassertion time for AAD



 WE signals timings (in nanoseconds) corresponding to GPMC_CONFIG4:

 - gpmc,we-on-ns	Assertion time
@@ -54,6 +57,8 @@ Timing properties for child nodes. All are optional and default to 0. 
 OE signals timings (in nanoseconds) corresponding to GPMC_CONFIG4:

 - gpmc,oe-on-ns:	Assertion time

 - gpmc,oe-off-ns:	Deassertion time

 - gpmc,oe-aad-mux-on-ns:	Assertion time for AAD

 - gpmc,oe-aad-mux-off-ns:	Deassertion time for AAD



 Access time and cycle time timings (in nanoseconds) corresponding to

 GPMC_CONFIG5:

Documentation/devicetree/bindings/reset/img,pistachio-reset.txt

0 → 100644
+55 −0
Original line number Diff line number Diff line 
Pistachio Reset Controller

=============================================================================



This binding describes a reset controller device that is used to enable and

disable individual IP blocks within the Pistachio SoC using "soft reset"

control bits found in the Pistachio SoC top level registers.



The actual action taken when soft reset is asserted is hardware dependent.

However, when asserted it may not be possible to access the hardware's

registers, and following an assert/deassert sequence the hardware's previous

state may no longer be valid.



Please refer to Documentation/devicetree/bindings/reset/reset.txt

for common reset controller binding usage.



Required properties:



- compatible: Contains "img,pistachio-reset"



- #reset-cells: Contains 1



Example:



	cr_periph: clk@18148000 {

		compatible = "img,pistachio-cr-periph", "syscon", "simple-mfd";

		reg = <0x18148000 0x1000>;

		clocks = <&clk_periph PERIPH_CLK_SYS>;

		clock-names = "sys";

		#clock-cells = <1>;



		pistachio_reset: reset-controller {

			compatible = "img,pistachio-reset";

			#reset-cells = <1>;

		};

	};



Specifying reset control of devices

=======================================



Device nodes should specify the reset channel required in their "resets"

property, containing a phandle to the pistachio reset device node and an

index specifying which reset to use, as described in

Documentation/devicetree/bindings/reset/reset.txt.



Example:



	spdif_out: spdif-out@18100d00 {

		...

		resets = <&pistachio_reset PISTACHIO_RESET_SPDIF_OUT>;

		reset-names = "rst";

		...

	};



Macro definitions for the supported resets can be found in:

include/dt-bindings/reset/pistachio-resets.h

Documentation/devicetree/bindings/soc/rockchip/power_domain.txt

+21 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ powered up/down by software based on different application scenes to save power. 
Required properties for power domain controller:

- compatible: Should be one of the following.

	"rockchip,rk3288-power-controller" - for RK3288 SoCs.

	"rockchip,rk3368-power-controller" - for RK3368 SoCs.

- #power-domain-cells: Number of cells in a power-domain specifier.

	Should be 1 for multiple PM domains.

- #address-cells: Should be 1.
@@ -14,6 +15,7 @@ Required properties for power domain controller: 
Required properties for power domain sub nodes:

- reg: index of the power domain, should use macros in:

	"include/dt-bindings/power/rk3288-power.h" - for RK3288 type power domain.

	"include/dt-bindings/power/rk3368-power.h" - for RK3368 type power domain.

- clocks (optional): phandles to clocks which need to be enabled while power domain

	switches state.
@@ -31,11 +33,24 @@ Example: 
		};

	};



	 power: power-controller {

                compatible = "rockchip,rk3368-power-controller";

                #power-domain-cells = <1>;

                #address-cells = <1>;

                #size-cells = <0>;



                pd_gpu_1 {

                        reg = <RK3368_PD_GPU_1>;

                        clocks = <&cru ACLK_GPU_CFG>;

                };

        };



Node of a device using power domains must have a power-domains property,

containing a phandle to the power device node and an index specifying which

power domain to use.

The index should use macros in:

	"include/dt-bindings/power/rk3288-power.h" - for rk3288 type power domain.

	"include/dt-bindings/power/rk3368-power.h" - for rk3368 type power domain.



Example of the node using power domain:
@@ -44,3 +59,9 @@ Example of the node using power domain: 
		power-domains = <&power RK3288_PD_GPU>;

		/* ... */

	};



	node {

                /* ... */

                power-domains = <&power RK3368_PD_GPU_1>;

                /* ... */

        };

arch/arm/mach-at91/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -104,6 +104,7 @@ config HAVE_AT91_USB_CLK 
config COMMON_CLK_AT91

	bool

	select COMMON_CLK

	select MFD_SYSCON



config HAVE_AT91_SMD

	bool

arch/arm/mach-at91/at91rm9200.c

+0 −2
Original line number Diff line number Diff line
@@ -12,7 +12,6 @@ 
#include <linux/of_platform.h>



#include <asm/mach/arch.h>

#include <asm/system_misc.h>



#include "generic.h"

#include "soc.h"
@@ -33,7 +32,6 @@ static void __init at91rm9200_dt_device_init(void) 


	of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev);



	arm_pm_idle = at91rm9200_idle;

	at91rm9200_pm_init();

}