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Commit 45db0738 authored by John David Anglin's avatar John David Anglin Committed by Helge Deller
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parisc: fix out-of-register compiler error in ldcw inline assembler function 



The __ldcw macro has a problem when its argument needs to be reloaded from
memory. The output memory operand and the input register operand both need to
be reloaded using a register in class R1_REGS when generating 64-bit code.
This fails because there's only a single register in the class. Instead, use a
memory clobber. This also makes the __ldcw macro a compiler memory barrier.

Signed-off-by: default avatarJohn David Anglin <dave.anglin@bell.net>
Cc: <stable@vger.kernel.org>        [3.13+]
Signed-off-by: default avatarHelge Deller <deller@gmx.de>
parent b2776bf7

arch/parisc/include/asm/ldcw.h

+10 −3
Original line number Diff line number Diff line
@@ -33,11 +33,18 @@ 


#endif /*!CONFIG_PA20*/



/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*.  */

/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*.

   We don't explicitly expose that "*a" may be written as reload

   fails to find a register in class R1_REGS when "a" needs to be

   reloaded when generating 64-bit PIC code.  Instead, we clobber

   memory to indicate to the compiler that the assembly code reads

   or writes to items other than those listed in the input and output

   operands.  This may pessimize the code somewhat but __ldcw is

   usually used within code blocks surrounded by memory barriors.  */

#define __ldcw(a) ({						\

	unsigned __ret;						\

	__asm__ __volatile__(__LDCW " 0(%2),%0"			\

		: "=r" (__ret), "+m" (*(a)) : "r" (a));		\

	__asm__ __volatile__(__LDCW " 0(%1),%0"			\

		: "=r" (__ret) : "r" (a) : "memory");		\

	__ret;							\

})