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Commit 451938d5 authored by Linus Walleij's avatar Linus Walleij
Browse files

gpio: clarify open drain/source docs 



Make the text clearer, remove reference to confusing "positive"
and "negative" and elaborate a bit.

Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 0c0451e7

Documentation/gpio/driver.txt

+14 −6
Original line number Original line Diff line number Diff line
@@ -100,6 +100,10 @@ Both usecases require that the line be equipped with a pull-up resistor. This 
resistor will make the line tend to high level unless one of the transistors on

resistor will make the line tend to high level unless one of the transistors on

the rail actively pulls it down.

the rail actively pulls it down.





The level on the line will go as high as the VDD on the pull-up resistor, which

may be higher than the level supported by the transistor, achieveing a

level-shift to the higher VDD.



Integrated electronics often have an output driver stage in the form of a CMOS

Integrated electronics often have an output driver stage in the form of a CMOS

"totem-pole" with one N-MOS and one P-MOS transistor where one of them drives

"totem-pole" with one N-MOS and one P-MOS transistor where one of them drives

the line high and one of them drives the line low. This is called a push-pull

the line high and one of them drives the line low. This is called a push-pull
@@ -110,14 +114,18 @@ output. The "totem-pole" looks like so: 
        OD    ||--+

        OD    ||--+

     +--/ ---o||     P-MOS-FET

     +--/ ---o||     P-MOS-FET

     |        ||--+

     |        ||--+

in --+            +----- out

IN --+            +----- out

     |        ||--+

     |        ||--+

     +--/ ----||     N-MOS-FET

     +--/ ----||     N-MOS-FET

        OS    ||--+

        OS    ||--+

                  |

                  |

                 GND

                 GND





You see the little "switches" named "OD" and "OS" that enable/disable the

The desired output signal (e.g. coming directly from some GPIO output register)

arrives at IN. The switches named "OD" and "OS" are normally closed, creating

a push-pull circuit.



Consider the little "switches" named "OD" and "OS" that enable/disable the

P-MOS or N-MOS transistor right after the split of the input. As you can see,

P-MOS or N-MOS transistor right after the split of the input. As you can see,

either transistor will go totally numb if this switch is open. The totem-pole

either transistor will go totally numb if this switch is open. The totem-pole

is then halved and give high impedance instead of actively driving the line

is then halved and give high impedance instead of actively driving the line
@@ -128,8 +136,8 @@ Some GPIO hardware come in open drain / open source configuration. Some are 
hard-wired lines that will only support open drain or open source no matter

hard-wired lines that will only support open drain or open source no matter

what: there is only one transistor there. Some are software-configurable:

what: there is only one transistor there. Some are software-configurable:

by flipping a bit in a register the output can be configured as open drain

by flipping a bit in a register the output can be configured as open drain

or open source, by flicking open the switches labeled "OD" and "OS" in the

or open source, in practice by flicking open the switches labeled "OD" and "OS"

drawing above.

in the drawing above.





By disabling the P-MOS transistor, the output can be driven between GND and

By disabling the P-MOS transistor, the output can be driven between GND and

high impedance (open drain), and by disabling the N-MOS transistor, the output

high impedance (open drain), and by disabling the N-MOS transistor, the output
@@ -146,8 +154,8 @@ set in the machine file, or coming from other hardware descriptions. 
If this state can not be configured in hardware, i.e. if the GPIO hardware does

If this state can not be configured in hardware, i.e. if the GPIO hardware does

not support open drain/open source in hardware, the GPIO library will instead

not support open drain/open source in hardware, the GPIO library will instead

use a trick: when a line is set as output, if the line is flagged as open

use a trick: when a line is set as output, if the line is flagged as open

drain, and the output value is negative, it will be driven low as usual. But

drain, and the IN output value is low, it will be driven low as usual. But

if the output value is set to positive, it will instead *NOT* be driven high,

if the IN output value is set to high, it will instead *NOT* be driven high,

instead it will be switched to input, as input mode is high impedance, thus

instead it will be switched to input, as input mode is high impedance, thus

achieveing an "open drain emulation" of sorts: electrically the behaviour will

achieveing an "open drain emulation" of sorts: electrically the behaviour will

be identical, with the exception of possible hardware glitches when switching

be identical, with the exception of possible hardware glitches when switching