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Commit 44d21c3f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 

Pull crypto update from Herbert Xu:
 "Here is the crypto update for 4.2:

  API:

   - Convert RNG interface to new style.

   - New AEAD interface with one SG list for AD and plain/cipher text.
     All external AEAD users have been converted.

   - New asymmetric key interface (akcipher).

  Algorithms:

   - Chacha20, Poly1305 and RFC7539 support.

   - New RSA implementation.

   - Jitter RNG.

   - DRBG is now seeded with both /dev/random and Jitter RNG.  If kernel
     pool isn't ready then DRBG will be reseeded when it is.

   - DRBG is now the default crypto API RNG, replacing krng.

   - 842 compression (previously part of powerpc nx driver).

  Drivers:

   - Accelerated SHA-512 for arm64.

   - New Marvell CESA driver that supports DMA and more algorithms.

   - Updated powerpc nx 842 support.

   - Added support for SEC1 hardware to talitos"

* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (292 commits)
  crypto: marvell/cesa - remove COMPILE_TEST dependency
  crypto: algif_aead - Temporarily disable all AEAD algorithms
  crypto: af_alg - Forbid the use internal algorithms
  crypto: echainiv - Only hold RNG during initialisation
  crypto: seqiv - Add compatibility support without RNG
  crypto: eseqiv - Offer normal cipher functionality without RNG
  crypto: chainiv - Offer normal cipher functionality without RNG
  crypto: user - Add CRYPTO_MSG_DELRNG
  crypto: user - Move cryptouser.h to uapi
  crypto: rng - Do not free default RNG when it becomes unused
  crypto: skcipher - Allow givencrypt to be NULL
  crypto: sahara - propagate the error on clk_disable_unprepare() failure
  crypto: rsa - fix invalid select for AKCIPHER
  crypto: picoxcell - Update to the current clk API
  crypto: nx - Check for bogus firmware properties
  crypto: marvell/cesa - add DT bindings documentation
  crypto: marvell/cesa - add support for Kirkwood and Dove SoCs
  crypto: marvell/cesa - add support for Orion SoCs
  crypto: marvell/cesa - add allhwsupport module parameter
  crypto: marvell/cesa - add support for all armada SoCs
  ...
parents efdfce2b fe55dfdc

Documentation/DocBook/crypto-API.tmpl

+39 −28
Original line number Original line Diff line number Diff line
@@ -119,7 +119,7 @@ 




    <para>

    <para>

     Note: The terms "transformation" and cipher algorithm are used

     Note: The terms "transformation" and cipher algorithm are used

     interchangably.

     interchangeably.

    </para>

    </para>

   </sect1>

   </sect1>
@@ -536,8 +536,8 @@ 




     <para>

     <para>

      For other use cases of AEAD ciphers, the ASCII art applies as

      For other use cases of AEAD ciphers, the ASCII art applies as

      well, but the caller may not use the GIVCIPHER interface. In

      well, but the caller may not use the AEAD cipher with a separate

      this case, the caller must generate the IV.

      IV generator. In this case, the caller must generate the IV.

     </para>

     </para>





     <para>

     <para>
@@ -584,8 +584,8 @@ kernel crypto API | IPSEC Layer 
                                                 |

                                                 |

+-----------+                                    |

+-----------+                                    |

|           |            (1)

|           |            (1)

| givcipher | <-----------------------------------  esp_output

|   aead    | <-----------------------------------  esp_output

|  (seqiv)  | ---+

| (seqniv)  | ---+

+-----------+    |

+-----------+    |

                 | (2)

                 | (2)

+-----------+    |

+-----------+    |
@@ -620,8 +620,8 @@ kernel crypto API | IPSEC Layer 
     <orderedlist>

     <orderedlist>

      <listitem>

      <listitem>

       <para>

       <para>

        esp_output() invokes crypto_aead_givencrypt() to trigger an encryption

        esp_output() invokes crypto_aead_encrypt() to trigger an encryption

        operation of the GIVCIPHER implementation.

        operation of the AEAD cipher with IV generator.

       </para>

       </para>





       <para>

       <para>
@@ -1563,7 +1563,7 @@ struct sockaddr_alg sa = { 




   <sect1><title>Zero-Copy Interface</title>

   <sect1><title>Zero-Copy Interface</title>

    <para>

    <para>

     In addition to the send/write/read/recv system call familty, the AF_ALG

     In addition to the send/write/read/recv system call family, the AF_ALG

     interface can be accessed with the zero-copy interface of splice/vmsplice.

     interface can be accessed with the zero-copy interface of splice/vmsplice.

     As the name indicates, the kernel tries to avoid a copy operation into

     As the name indicates, the kernel tries to avoid a copy operation into

     kernel space.

     kernel space.
@@ -1669,9 +1669,19 @@ read(opfd, out, outlen); 
  </chapter>

  </chapter>





  <chapter id="API"><title>Programming Interface</title>

  <chapter id="API"><title>Programming Interface</title>

   <para>

    Please note that the kernel crypto API contains the AEAD givcrypt

    API (crypto_aead_giv* and aead_givcrypt_* function calls in

    include/crypto/aead.h). This API is obsolete and will be removed

    in the future. To obtain the functionality of an AEAD cipher with

    internal IV generation, use the IV generator as a regular cipher.

    For example, rfc4106(gcm(aes)) is the AEAD cipher with external

    IV generation and seqniv(rfc4106(gcm(aes))) implies that the kernel

    crypto API generates the IV. Different IV generators are available.

   </para>

   <sect1><title>Block Cipher Context Data Structures</title>

   <sect1><title>Block Cipher Context Data Structures</title>

!Pinclude/linux/crypto.h Block Cipher Context Data Structures

!Pinclude/linux/crypto.h Block Cipher Context Data Structures

!Finclude/linux/crypto.h aead_request

!Finclude/crypto/aead.h aead_request

   </sect1>

   </sect1>

   <sect1><title>Block Cipher Algorithm Definitions</title>

   <sect1><title>Block Cipher Algorithm Definitions</title>

!Pinclude/linux/crypto.h Block Cipher Algorithm Definitions

!Pinclude/linux/crypto.h Block Cipher Algorithm Definitions
@@ -1680,7 +1690,7 @@ read(opfd, out, outlen); 
!Finclude/linux/crypto.h aead_alg

!Finclude/linux/crypto.h aead_alg

!Finclude/linux/crypto.h blkcipher_alg

!Finclude/linux/crypto.h blkcipher_alg

!Finclude/linux/crypto.h cipher_alg

!Finclude/linux/crypto.h cipher_alg

!Finclude/linux/crypto.h rng_alg

!Finclude/crypto/rng.h rng_alg

   </sect1>

   </sect1>

   <sect1><title>Asynchronous Block Cipher API</title>

   <sect1><title>Asynchronous Block Cipher API</title>

!Pinclude/linux/crypto.h Asynchronous Block Cipher API

!Pinclude/linux/crypto.h Asynchronous Block Cipher API
@@ -1704,26 +1714,27 @@ read(opfd, out, outlen); 
!Finclude/linux/crypto.h ablkcipher_request_set_crypt

!Finclude/linux/crypto.h ablkcipher_request_set_crypt

   </sect1>

   </sect1>

   <sect1><title>Authenticated Encryption With Associated Data (AEAD) Cipher API</title>

   <sect1><title>Authenticated Encryption With Associated Data (AEAD) Cipher API</title>

!Pinclude/linux/crypto.h Authenticated Encryption With Associated Data (AEAD) Cipher API

!Pinclude/crypto/aead.h Authenticated Encryption With Associated Data (AEAD) Cipher API

!Finclude/linux/crypto.h crypto_alloc_aead

!Finclude/crypto/aead.h crypto_alloc_aead

!Finclude/linux/crypto.h crypto_free_aead

!Finclude/crypto/aead.h crypto_free_aead

!Finclude/linux/crypto.h crypto_aead_ivsize

!Finclude/crypto/aead.h crypto_aead_ivsize

!Finclude/linux/crypto.h crypto_aead_authsize

!Finclude/crypto/aead.h crypto_aead_authsize

!Finclude/linux/crypto.h crypto_aead_blocksize

!Finclude/crypto/aead.h crypto_aead_blocksize

!Finclude/linux/crypto.h crypto_aead_setkey

!Finclude/crypto/aead.h crypto_aead_setkey

!Finclude/linux/crypto.h crypto_aead_setauthsize

!Finclude/crypto/aead.h crypto_aead_setauthsize

!Finclude/linux/crypto.h crypto_aead_encrypt

!Finclude/crypto/aead.h crypto_aead_encrypt

!Finclude/linux/crypto.h crypto_aead_decrypt

!Finclude/crypto/aead.h crypto_aead_decrypt

   </sect1>

   </sect1>

   <sect1><title>Asynchronous AEAD Request Handle</title>

   <sect1><title>Asynchronous AEAD Request Handle</title>

!Pinclude/linux/crypto.h Asynchronous AEAD Request Handle

!Pinclude/crypto/aead.h Asynchronous AEAD Request Handle

!Finclude/linux/crypto.h crypto_aead_reqsize

!Finclude/crypto/aead.h crypto_aead_reqsize

!Finclude/linux/crypto.h aead_request_set_tfm

!Finclude/crypto/aead.h aead_request_set_tfm

!Finclude/linux/crypto.h aead_request_alloc

!Finclude/crypto/aead.h aead_request_alloc

!Finclude/linux/crypto.h aead_request_free

!Finclude/crypto/aead.h aead_request_free

!Finclude/linux/crypto.h aead_request_set_callback

!Finclude/crypto/aead.h aead_request_set_callback

!Finclude/linux/crypto.h aead_request_set_crypt

!Finclude/crypto/aead.h aead_request_set_crypt

!Finclude/linux/crypto.h aead_request_set_assoc

!Finclude/crypto/aead.h aead_request_set_assoc

!Finclude/crypto/aead.h aead_request_set_ad

   </sect1>

   </sect1>

   <sect1><title>Synchronous Block Cipher API</title>

   <sect1><title>Synchronous Block Cipher API</title>

!Pinclude/linux/crypto.h Synchronous Block Cipher API

!Pinclude/linux/crypto.h Synchronous Block Cipher API

Documentation/devicetree/bindings/crypto/fsl-sec2.txt

+4 −2
Original line number Original line Diff line number Diff line 
Freescale SoC SEC Security Engines versions 2.x-3.x

Freescale SoC SEC Security Engines versions 1.x-2.x-3.x





Required properties:

Required properties:





- compatible : Should contain entries for this and backward compatible

- compatible : Should contain entries for this and backward compatible

  SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0"

  SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0" (SEC2/3)

                             e.g., "fsl,sec1.2", "fsl,sec1.0" (SEC1)

    warning: SEC1 and SEC2 are mutually exclusive

- reg : Offset and length of the register set for the device

- reg : Offset and length of the register set for the device

- interrupts : the SEC's interrupt number

- interrupts : the SEC's interrupt number

- fsl,num-channels : An integer representing the number of channels

- fsl,num-channels : An integer representing the number of channels

Documentation/devicetree/bindings/crypto/marvell-cesa.txt

0 → 100644
+45 −0
Original line number Original line Diff line number Diff line 
Marvell Cryptographic Engines And Security Accelerator



Required properties:

- compatible: should be one of the following string

	      "marvell,orion-crypto"

	      "marvell,kirkwood-crypto"

	      "marvell,dove-crypto"

	      "marvell,armada-370-crypto"

	      "marvell,armada-xp-crypto"

	      "marvell,armada-375-crypto"

	      "marvell,armada-38x-crypto"

- reg: base physical address of the engine and length of memory mapped

       region. Can also contain an entry for the SRAM attached to the CESA,

       but this representation is deprecated and marvell,crypto-srams should

       be used instead

- reg-names: "regs". Can contain an "sram" entry, but this representation

	     is deprecated and marvell,crypto-srams should be used instead

- interrupts: interrupt number

- clocks: reference to the crypto engines clocks. This property is not

	  required for orion and kirkwood platforms

- clock-names: "cesaX" and "cesazX", X should be replaced by the crypto engine

	       id.

	       This property is not required for the orion and kirkwoord

	       platforms.

	       "cesazX" clocks are not required on armada-370 platforms

- marvell,crypto-srams: phandle to crypto SRAM definitions



Optional properties:

- marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not

			    specified the whole SRAM is used (2KB)





Examples:



	crypto@90000 {

		compatible = "marvell,armada-xp-crypto";

		reg = <0x90000 0x10000>;

		reg-names = "regs";

		interrupts = <48>, <49>;

		clocks = <&gateclk 23>, <&gateclk 23>;

		clock-names = "cesa0", "cesa1";

		marvell,crypto-srams = <&crypto_sram0>, <&crypto_sram1>;

		marvell,crypto-sram-size = <0x600>;

		status = "okay";

	};

Documentation/devicetree/bindings/crypto/mv_cesa.txt

+22 −9
Original line number Original line Diff line number Diff line 
Marvell Cryptographic Engines And Security Accelerator

Marvell Cryptographic Engines And Security Accelerator





Required properties:

Required properties:

- compatible : should be "marvell,orion-crypto"

- compatible: should be one of the following string

	      "marvell,orion-crypto"

	      "marvell,kirkwood-crypto"

	      "marvell,dove-crypto"

- reg: base physical address of the engine and length of memory mapped

- reg: base physical address of the engine and length of memory mapped

        region, followed by base physical address of sram and its memory

       region. Can also contain an entry for the SRAM attached to the CESA,

        length

       but this representation is deprecated and marvell,crypto-srams should

- reg-names : "regs" , "sram";

       be used instead

- reg-names: "regs". Can contain an "sram" entry, but this representation

	     is deprecated and marvell,crypto-srams should be used instead

- interrupts: interrupt number

- interrupts: interrupt number

- clocks: reference to the crypto engines clocks. This property is only

	  required for Dove platforms

- marvell,crypto-srams: phandle to crypto SRAM definitions



Optional properties:

- marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not

			    specified the whole SRAM is used (2KB)





Examples:

Examples:





	crypto@30000 {

	crypto@30000 {

		compatible = "marvell,orion-crypto";

		compatible = "marvell,orion-crypto";

		reg = <0x30000 0x10000>,

		reg = <0x30000 0x10000>;

		      <0x4000000 0x800>;

		reg-names = "regs";

		reg-names = "regs" , "sram";

		interrupts = <22>;

		interrupts = <22>;

		marvell,crypto-srams = <&crypto_sram>;

		marvell,crypto-sram-size = <0x600>;

		status = "okay";

		status = "okay";

	};
 
	};

MAINTAINERS

+13 −3
Original line number Original line Diff line number Diff line
@@ -4879,13 +4879,23 @@ M: Marcelo Henrique Cerri <mhcerri@linux.vnet.ibm.com> 
M:	Fionnuala Gunter <fin@linux.vnet.ibm.com>

M:	Fionnuala Gunter <fin@linux.vnet.ibm.com>

L:	linux-crypto@vger.kernel.org

L:	linux-crypto@vger.kernel.org

S:	Supported

S:	Supported

F:	drivers/crypto/nx/

F:	drivers/crypto/nx/Makefile

F:	drivers/crypto/nx/Kconfig

F:	drivers/crypto/nx/nx-aes*

F:	drivers/crypto/nx/nx-sha*

F:	drivers/crypto/nx/nx.*

F:	drivers/crypto/nx/nx_csbcpb.h

F:	drivers/crypto/nx/nx_debugfs.h





IBM Power 842 compression accelerator

IBM Power 842 compression accelerator

M:	Dan Streetman <ddstreet@us.ibm.com>

M:	Dan Streetman <ddstreet@us.ibm.com>

S:	Supported

S:	Supported

F:	drivers/crypto/nx/nx-842.c

F:	drivers/crypto/nx/Makefile

F:	include/linux/nx842.h

F:	drivers/crypto/nx/Kconfig

F:	drivers/crypto/nx/nx-842*

F:	include/linux/sw842.h

F:	crypto/842.c

F:	lib/842/





IBM Power Linux RAID adapter

IBM Power Linux RAID adapter

M:	Brian King <brking@us.ibm.com>

M:	Brian King <brking@us.ibm.com>